From: Fuad Tabba <tabba@google.com>
To: kvmarm@lists.cs.columbia.edu
Cc: kernel-team@android.com, kvm@vger.kernel.org, maz@kernel.org,
pbonzini@redhat.com, will@kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 06/13] KVM: arm64: Add feature register flag definitions
Date: Tue, 15 Jun 2021 14:39:43 +0100 [thread overview]
Message-ID: <20210615133950.693489-7-tabba@google.com> (raw)
In-Reply-To: <20210615133950.693489-1-tabba@google.com>
Add feature register flag definitions to clarify which features
might be supported.
No functional change intended.
Signed-off-by: Fuad Tabba <tabba@google.com>
---
arch/arm64/include/asm/sysreg.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 65d15700a168..42bcc5102d10 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -789,6 +789,10 @@
#define ID_AA64PFR0_FP_SUPPORTED 0x0
#define ID_AA64PFR0_ASIMD_NI 0xf
#define ID_AA64PFR0_ASIMD_SUPPORTED 0x0
+#define ID_AA64PFR0_EL3_64BIT_ONLY 0x1
+#define ID_AA64PFR0_EL3_32BIT_64BIT 0x2
+#define ID_AA64PFR0_EL2_64BIT_ONLY 0x1
+#define ID_AA64PFR0_EL2_32BIT_64BIT 0x2
#define ID_AA64PFR0_EL1_64BIT_ONLY 0x1
#define ID_AA64PFR0_EL1_32BIT_64BIT 0x2
#define ID_AA64PFR0_EL0_64BIT_ONLY 0x1
@@ -848,12 +852,16 @@
#define ID_AA64MMFR0_ASID_SHIFT 4
#define ID_AA64MMFR0_PARANGE_SHIFT 0
+#define ID_AA64MMFR0_ASID_8 0x0
+#define ID_AA64MMFR0_ASID_16 0x2
+
#define ID_AA64MMFR0_TGRAN4_NI 0xf
#define ID_AA64MMFR0_TGRAN4_SUPPORTED 0x0
#define ID_AA64MMFR0_TGRAN64_NI 0xf
#define ID_AA64MMFR0_TGRAN64_SUPPORTED 0x0
#define ID_AA64MMFR0_TGRAN16_NI 0x0
#define ID_AA64MMFR0_TGRAN16_SUPPORTED 0x1
+#define ID_AA64MMFR0_PARANGE_40 0x2
#define ID_AA64MMFR0_PARANGE_48 0x5
#define ID_AA64MMFR0_PARANGE_52 0x6
@@ -901,6 +909,7 @@
#define ID_AA64MMFR2_CNP_SHIFT 0
/* id_aa64dfr0 */
+#define ID_AA64DFR0_MTPMU_SHIFT 48
#define ID_AA64DFR0_TRBE_SHIFT 44
#define ID_AA64DFR0_TRACE_FILT_SHIFT 40
#define ID_AA64DFR0_DOUBLELOCK_SHIFT 36
--
2.32.0.272.g935e593368-goog
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next prev parent reply other threads:[~2021-06-15 13:40 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-15 13:39 [PATCH v2 00/13] KVM: arm64: Fixed features for protected VMs Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 01/13] KVM: arm64: Remove trailing whitespace in comments Fuad Tabba
2021-07-01 12:55 ` Will Deacon
2021-07-01 13:24 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 02/13] KVM: arm64: MDCR_EL2 is a 64-bit register Fuad Tabba
2021-07-01 12:53 ` Will Deacon
2021-07-01 13:24 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 03/13] KVM: arm64: Fix names of config register fields Fuad Tabba
2021-07-01 13:01 ` Will Deacon
2021-07-01 13:44 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 04/13] KVM: arm64: Refactor sys_regs.h,c for nVHE reuse Fuad Tabba
2021-07-01 13:09 ` [PATCH v2 04/13] KVM: arm64: Refactor sys_regs.h, c " Will Deacon
2021-07-01 14:04 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 05/13] KVM: arm64: Restore mdcr_el2 from vcpu Fuad Tabba
2021-07-01 13:17 ` Will Deacon
2021-07-01 14:05 ` Fuad Tabba
2021-06-15 13:39 ` Fuad Tabba [this message]
2021-07-01 13:22 ` [PATCH v2 06/13] KVM: arm64: Add feature register flag definitions Will Deacon
2021-07-01 14:31 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 07/13] KVM: arm64: Add config register bit definitions Fuad Tabba
2021-07-01 13:33 ` Will Deacon
2021-07-01 14:52 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 08/13] KVM: arm64: Guest exit handlers for nVHE hyp Fuad Tabba
2021-07-01 13:48 ` Will Deacon
2021-07-01 14:58 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 09/13] KVM: arm64: Add trap handlers for protected VMs Fuad Tabba
2021-07-01 14:08 ` Will Deacon
2021-07-14 20:01 ` Andrew Jones
2021-06-15 13:39 ` [PATCH v2 10/13] KVM: arm64: Move sanitized copies of CPU features Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 11/13] KVM: arm64: Trap access to pVM restricted features Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 12/13] KVM: arm64: Handle protected guests at 32 bits Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 13/13] KVM: arm64: Check vcpu features at pVM creation Fuad Tabba
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