From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_INVALID,DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE31EC433F5 for ; Mon, 13 Sep 2021 20:50:03 +0000 (UTC) Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by mail.kernel.org (Postfix) with ESMTP id 9084C61106 for ; Mon, 13 Sep 2021 20:50:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 9084C61106 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.cs.columbia.edu Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 440CB4B1DD; Mon, 13 Sep 2021 16:50:03 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Authentication-Results: mm01.cs.columbia.edu (amavisd-new); dkim=softfail (fail, message has been altered) header.i=@google.com Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id dl0ACEDoHDTn; Mon, 13 Sep 2021 16:50:02 -0400 (EDT) Received: from mm01.cs.columbia.edu (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id DF15E4B1B6; Mon, 13 Sep 2021 16:50:01 -0400 (EDT) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 3617F4B1A2 for ; Mon, 13 Sep 2021 16:50:00 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7aaAGlGZCxWr for ; Mon, 13 Sep 2021 16:49:58 -0400 (EDT) Received: from mail-qk1-f202.google.com (mail-qk1-f202.google.com [209.85.222.202]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id B87F34B1DA for ; Mon, 13 Sep 2021 16:49:56 -0400 (EDT) Received: by mail-qk1-f202.google.com with SMTP id c27-20020a05620a165b00b003d3817c7c23so42451417qko.16 for ; Mon, 13 Sep 2021 13:49:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=T9aisqSrZe7Zpv0T/yzDlGfSGVHfKhvu7NylFmNxams=; b=U2aSQcO7IF/eNgrxE2U1PKMyzcXNYTpA8dyjXxngUFTYIAyGHZQaKe5mB+pm0sd56+ zcwE31/OSEWNP25QNYX+1eNlX2R+6qSK4mJ6f/6EdDEuPMpdp2q5IOLfqrFBFotCJsfM /RsHyWW56TowqEGRbXS1y7f6IrHLtliCa9jiNLGHgPo8B6t0amoVNU0nYrjCKqN928n/ 9ZTh5nFb3cfLGdCtstXLFiNTODxSdp0cIByCDp54Js0PFztmizCt6B8XdONWtzkOS6Is GwwWhWRsUdV6uhCm0UEAw29fYCsGBbAA+cJ+Z9pG77GuRwNajjSHqSMpnZ3zh7PSFQwr p++Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=T9aisqSrZe7Zpv0T/yzDlGfSGVHfKhvu7NylFmNxams=; b=M6Ztj56FpJBA1VmQF2/IpxCUMcDQOJ3tJCGyZES8jMA7DT4aCK6e7EENkTyADxKZy6 uyJM/9LNO12o7W93psFm7s2hs57GLkt0IVit/D9qmYLyIL0uaLB9n7Hh++oKr+ijdchp QibfbHF7YG+LXls1aIBUkk7eGZdkDV47v5MYEuDYCqkDTXzShtNrtkrcdEldws2rdcvl gI4nPtoN+TOR2ZMcor+PcFWOsI0V0aCsxzIstZyNE9BxQkCmWzXPiBvSfCAoTYMR9NEi sbx+ywjQE4hIpJWZV15tXyhx6Uax0e3tEBKcq/UN1xGhzjw6Jg+uxnu1S13QAb8j74bB lR1A== X-Gm-Message-State: AOAM533pLnrDE1uR5lTPDlJTd1/PvRhU6PSQcmtgOYh1EkHv92Mwrfdk 5YkH4OieyOdhcRgiaBq+gwzBQEPWw4wu X-Google-Smtp-Source: ABdhPJzKJc2tFN2+/khkLVLrxaULesb8G9J64uNF7vJmJj1Rm6dcUptznbZ9awnjZL3j1V3bY/AXxqk4isdl X-Received: from rananta-virt.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:1bcc]) (user=rananta job=sendgmr) by 2002:a0c:9c8a:: with SMTP id i10mr1496124qvf.59.1631566196297; Mon, 13 Sep 2021 13:49:56 -0700 (PDT) Date: Mon, 13 Sep 2021 20:49:22 +0000 In-Reply-To: <20210913204930.130715-1-rananta@google.com> Message-Id: <20210913204930.130715-7-rananta@google.com> Mime-Version: 1.0 References: <20210913204930.130715-1-rananta@google.com> X-Mailer: git-send-email 2.33.0.309.g3052b89438-goog Subject: [PATCH v5 06/14] KVM: arm64: selftests: Add basic support for arch_timers From: Raghavendra Rao Ananta To: Paolo Bonzini , Marc Zyngier , Andrew Jones , James Morse , Alexandru Elisei , Suzuki K Poulose Cc: kvm@vger.kernel.org, Catalin Marinas , Peter Shier , linux-kernel@vger.kernel.org, Will Deacon , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu Add a minimalistic library support to access the virtual timers, that can be used for simple timing functionalities, such as introducing delays in the guest. Signed-off-by: Raghavendra Rao Ananta Reviewed-by: Andrew Jones --- .../kvm/include/aarch64/arch_timer.h | 142 ++++++++++++++++++ 1 file changed, 142 insertions(+) create mode 100644 tools/testing/selftests/kvm/include/aarch64/arch_timer.h diff --git a/tools/testing/selftests/kvm/include/aarch64/arch_timer.h b/tools/testing/selftests/kvm/include/aarch64/arch_timer.h new file mode 100644 index 000000000000..cb7c03de3a21 --- /dev/null +++ b/tools/testing/selftests/kvm/include/aarch64/arch_timer.h @@ -0,0 +1,142 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * ARM Generic Timer specific interface + */ + +#ifndef SELFTEST_KVM_ARCH_TIMER_H +#define SELFTEST_KVM_ARCH_TIMER_H + +#include "processor.h" + +enum arch_timer { + VIRTUAL, + PHYSICAL, +}; + +#define CTL_ENABLE (1 << 0) +#define CTL_IMASK (1 << 1) +#define CTL_ISTATUS (1 << 2) + +#define msec_to_cycles(msec) \ + (timer_get_cntfrq() * (uint64_t)(msec) / 1000) + +#define usec_to_cycles(usec) \ + (timer_get_cntfrq() * (uint64_t)(usec) / 1000000) + +#define cycles_to_usec(cycles) \ + ((uint64_t)(cycles) * 1000000 / timer_get_cntfrq()) + +static inline uint32_t timer_get_cntfrq(void) +{ + return read_sysreg(cntfrq_el0); +} + +static inline uint64_t timer_get_cntct(enum arch_timer timer) +{ + isb(); + + switch (timer) { + case VIRTUAL: + return read_sysreg(cntvct_el0); + case PHYSICAL: + return read_sysreg(cntpct_el0); + default: + GUEST_ASSERT_1(0, timer); + } + + /* We should not reach here */ + return 0; +} + +static inline void timer_set_cval(enum arch_timer timer, uint64_t cval) +{ + switch (timer) { + case VIRTUAL: + write_sysreg(cval, cntv_cval_el0); + break; + case PHYSICAL: + write_sysreg(cval, cntp_cval_el0); + break; + default: + GUEST_ASSERT_1(0, timer); + } + + isb(); +} + +static inline uint64_t timer_get_cval(enum arch_timer timer) +{ + switch (timer) { + case VIRTUAL: + return read_sysreg(cntv_cval_el0); + case PHYSICAL: + return read_sysreg(cntp_cval_el0); + default: + GUEST_ASSERT_1(0, timer); + } + + /* We should not reach here */ + return 0; +} + +static inline void timer_set_tval(enum arch_timer timer, uint32_t tval) +{ + switch (timer) { + case VIRTUAL: + write_sysreg(tval, cntv_tval_el0); + break; + case PHYSICAL: + write_sysreg(tval, cntp_tval_el0); + break; + default: + GUEST_ASSERT_1(0, timer); + } + + isb(); +} + +static inline void timer_set_ctl(enum arch_timer timer, uint32_t ctl) +{ + switch (timer) { + case VIRTUAL: + write_sysreg(ctl, cntv_ctl_el0); + break; + case PHYSICAL: + write_sysreg(ctl, cntp_ctl_el0); + break; + default: + GUEST_ASSERT_1(0, timer); + } + + isb(); +} + +static inline uint32_t timer_get_ctl(enum arch_timer timer) +{ + switch (timer) { + case VIRTUAL: + return read_sysreg(cntv_ctl_el0); + case PHYSICAL: + return read_sysreg(cntp_ctl_el0); + default: + GUEST_ASSERT_1(0, timer); + } + + /* We should not reach here */ + return 0; +} + +static inline void timer_set_next_cval_ms(enum arch_timer timer, uint32_t msec) +{ + uint64_t now_ct = timer_get_cntct(timer); + uint64_t next_ct = now_ct + msec_to_cycles(msec); + + timer_set_cval(timer, next_ct); +} + +static inline void timer_set_next_tval_ms(enum arch_timer timer, uint32_t msec) +{ + timer_set_tval(timer, msec_to_cycles(msec)); +} + +#endif /* SELFTEST_KVM_ARCH_TIMER_H */ -- 2.33.0.309.g3052b89438-goog _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm