From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>
Cc: Mark Brown <broonie@kernel.org>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH] KVM: arm64: Enable Cortex-A510 erratum 2077057 by default
Date: Fri, 25 Feb 2022 18:46:58 +0000 [thread overview]
Message-ID: <20220225184658.172527-1-broonie@kernel.org> (raw)
The recently added configuration option for Cortex A510 erratum 2077057 does
not have a "default y" unlike other errata fixes. This appears to simply be
an oversight since the help text suggests enabling the option if unsure and
there's nothing in the commit log to suggest it is intentional.
Fixes: 1dd498e5e26ad ("KVM: arm64: Workaround Cortex-A510's single-step and PAC trap errata")
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index f8e5f64fc40b..fd5f44bfa3e3 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -685,6 +685,7 @@ config ARM64_ERRATUM_2051678
config ARM64_ERRATUM_2077057
bool "Cortex-A510: 2077057: workaround software-step corrupting SPSR_EL2"
+ default y
help
This option adds the workaround for ARM Cortex-A510 erratum 2077057.
Affected Cortex-A510 may corrupt SPSR_EL2 when the a step exception is
--
2.30.2
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next reply other threads:[~2022-02-25 18:47 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-25 18:46 Mark Brown [this message]
2022-03-02 14:09 ` [PATCH] KVM: arm64: Enable Cortex-A510 erratum 2077057 by default Catalin Marinas
2022-03-02 15:01 ` Marc Zyngier
2022-03-02 15:05 ` Marc Zyngier
2022-03-08 18:42 ` Catalin Marinas
2022-03-08 18:44 ` Catalin Marinas
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