From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08AAFC433F5 for ; Thu, 3 Mar 2022 03:55:24 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 6634049F05; Wed, 2 Mar 2022 22:55:24 -0500 (EST) X-Virus-Scanned: at lists.cs.columbia.edu Authentication-Results: mm01.cs.columbia.edu (amavisd-new); dkim=softfail (fail, message has been altered) header.i=@google.com Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7Q-YeEAsUaaQ; Wed, 2 Mar 2022 22:55:23 -0500 (EST) Received: from mm01.cs.columbia.edu (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 4846549EFB; Wed, 2 Mar 2022 22:55:23 -0500 (EST) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 1102D49EFB for ; Wed, 2 Mar 2022 22:55:22 -0500 (EST) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id U9lZbSly5fQ5 for ; Wed, 2 Mar 2022 22:55:20 -0500 (EST) Received: from mail-yw1-f202.google.com (mail-yw1-f202.google.com [209.85.128.202]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id C7B9A49EF8 for ; Wed, 2 Mar 2022 22:55:20 -0500 (EST) Received: by mail-yw1-f202.google.com with SMTP id 00721157ae682-2d726bd83a2so31190437b3.20 for ; Wed, 02 Mar 2022 19:55:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:message-id:mime-version:subject:from:to:cc; bh=7hpXMqaCEkEB7Bx15AIkPLODG6VSJouGbjh17YaxmTc=; b=OLpT04cetG8fcEWG5/b5prO9PeE1zRzjatqOWS9m9F75ZeuNMmMwnRotwWDPlQaixf utXpi/1iwLCp6gBKiUY7SRcGDL80co1c7/yLGdrHvCuLL4SbwyWIrLcx1zvcfcc9Q0E5 zU7Znery7da7+ng1uq0iGaNam/ATVUnQQUGqxQG7kkTn2SdqWhQ4HlHSelu0zkzHEDBY 9CK6Cn81oYdbT3S54AV4e8RLcsmMRLhWUgXVWaAUPLAMXNket6a3SUxGtiqzeoJUvzZZ waUQlYvEmRwx+RLFBIZcGQbD+Qa3XJkD4vyeUcS81LaNGDKH50lfIXIM8Thxcmmslc6N MTjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:message-id:mime-version:subject:from:to:cc; bh=7hpXMqaCEkEB7Bx15AIkPLODG6VSJouGbjh17YaxmTc=; b=MMMm/Vi9rUvkxxJdryhU0mXylJgepZOuKOArrNRSUnYfy8YPmEDjs+LICDMMZc6hgl jGJ2XY0vNJ/nUVSRTtbiiQYPwyfcFtakIL6kXr5lqxZkGgOKRhL0W7vybP5jtE0UhjwL zEIaGu6C6pMccbyT+kBPuD3qy/YT7IeT7FKCX+Cw6CzIlmSV2IEBedhCRPsL9NhK03GL A0+5YVRBAiEiA2GUV+h4V0Mq8jP0EnoSvaojzRwPNWUQcuXq8e1zQ8gpGC2HpiHNecbU 7vO5lO+CkgfDG26/B23qrtgLtz4AynPB4keq/bXUE+1w1N3/mpK+e17jS8kE61HewMSC tIyA== X-Gm-Message-State: AOAM530coBRqeAZ5wGP8MvqYl2LqOZ6OW3/h3PkC2gh8N5UaFfRABBdw PFC793kC/7ryWgcc73HOx3lQnPrTpxk= X-Google-Smtp-Source: ABdhPJzUJIgejr3blx9qXWZIWOIzHNseYmCooyAJDB7EyY/J0oalqOvUtDwIAbZy2nCrb1py0++M00oZmGU= X-Received: from reiji-vws-sp.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:3d59]) (user=reijiw job=sendgmr) by 2002:a25:4454:0:b0:60a:69f9:f1c5 with SMTP id r81-20020a254454000000b0060a69f9f1c5mr32171447yba.285.1646279720231; Wed, 02 Mar 2022 19:55:20 -0800 (PST) Date: Wed, 2 Mar 2022 19:54:06 -0800 Message-Id: <20220303035408.3708241-1-reijiw@google.com> Mime-Version: 1.0 X-Mailer: git-send-email 2.35.1.574.g5d30c73bfb-goog Subject: [PATCH v3 1/3] KVM: arm64: Generalise VM features into a set of flags From: Reiji Watanabe To: Marc Zyngier , kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, Will Deacon , Peter Shier , Paolo Bonzini , linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu From: Marc Zyngier We currently deal with a set of booleans for VM features, while they could be better represented as set of flags contained in an unsigned long, similarily to what we are doing on the CPU side. Signed-off-by: Marc Zyngier Reviewed-by: Andrew Jones Signed-off-by: Reiji Watanabe --- arch/arm64/include/asm/kvm_host.h | 12 +++++++----- arch/arm64/kvm/arm.c | 5 +++-- arch/arm64/kvm/mmio.c | 3 ++- 3 files changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 5bc01e62c08a..11a7ae747ded 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -122,7 +122,10 @@ struct kvm_arch { * should) opt in to this feature if KVM_CAP_ARM_NISV_TO_USER is * supported. */ - bool return_nisv_io_abort_to_user; +#define KVM_ARCH_FLAG_RETURN_NISV_IO_ABORT_TO_USER 0 + /* Memory Tagging Extension enabled for the guest */ +#define KVM_ARCH_FLAG_MTE_ENABLED 1 + unsigned long flags; /* * VM-wide PMU filter, implemented as a bitmap and big enough for @@ -133,9 +136,6 @@ struct kvm_arch { u8 pfr0_csv2; u8 pfr0_csv3; - - /* Memory Tagging Extension enabled for the guest */ - bool mte_enabled; }; struct kvm_vcpu_fault_info { @@ -786,7 +786,9 @@ bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu); #define kvm_arm_vcpu_sve_finalized(vcpu) \ ((vcpu)->arch.flags & KVM_ARM64_VCPU_SVE_FINALIZED) -#define kvm_has_mte(kvm) (system_supports_mte() && (kvm)->arch.mte_enabled) +#define kvm_has_mte(kvm) \ + (system_supports_mte() && \ + test_bit(KVM_ARCH_FLAG_MTE_ENABLED, &(kvm)->arch.flags)) #define kvm_vcpu_has_pmu(vcpu) \ (test_bit(KVM_ARM_VCPU_PMU_V3, (vcpu)->arch.features)) diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c index ecc5958e27fe..9a2d240ef6a3 100644 --- a/arch/arm64/kvm/arm.c +++ b/arch/arm64/kvm/arm.c @@ -89,7 +89,8 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm, switch (cap->cap) { case KVM_CAP_ARM_NISV_TO_USER: r = 0; - kvm->arch.return_nisv_io_abort_to_user = true; + set_bit(KVM_ARCH_FLAG_RETURN_NISV_IO_ABORT_TO_USER, + &kvm->arch.flags); break; case KVM_CAP_ARM_MTE: mutex_lock(&kvm->lock); @@ -97,7 +98,7 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm, r = -EINVAL; } else { r = 0; - kvm->arch.mte_enabled = true; + set_bit(KVM_ARCH_FLAG_MTE_ENABLED, &kvm->arch.flags); } mutex_unlock(&kvm->lock); break; diff --git a/arch/arm64/kvm/mmio.c b/arch/arm64/kvm/mmio.c index 3e2d8ba11a02..3dd38a151d2a 100644 --- a/arch/arm64/kvm/mmio.c +++ b/arch/arm64/kvm/mmio.c @@ -135,7 +135,8 @@ int io_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa) * volunteered to do so, and bail out otherwise. */ if (!kvm_vcpu_dabt_isvalid(vcpu)) { - if (vcpu->kvm->arch.return_nisv_io_abort_to_user) { + if (test_bit(KVM_ARCH_FLAG_RETURN_NISV_IO_ABORT_TO_USER, + &vcpu->kvm->arch.flags)) { run->exit_reason = KVM_EXIT_ARM_NISV; run->arm_nisv.esr_iss = kvm_vcpu_dabt_iss_nisv_sanitized(vcpu); run->arm_nisv.fault_ipa = fault_ipa; -- 2.35.1.574.g5d30c73bfb-goog _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm