From: Fuad Tabba <tabba@google.com>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org
Cc: maz@kernel.org, oliver.upton@linux.dev, james.clark@linaro.org,
will@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com,
yuzenghui@huawei.com, catalin.marinas@arm.com,
broonie@kernel.org, qperret@google.com,
kristina.martsenko@arm.com, tabba@google.com
Subject: [PATCH v5 06/17] KVM: arm64: Initialize feature id registers for protected VMs
Date: Mon, 16 Dec 2024 10:50:46 +0000 [thread overview]
Message-ID: <20241216105057.579031-7-tabba@google.com> (raw)
In-Reply-To: <20241216105057.579031-1-tabba@google.com>
The hypervisor maintains the state of protected VMs. Initialize
the values for feature ID registers for protected VMs, to be used
when setting traps and when advertising features to protected
VMs.
Signed-off-by: Fuad Tabba <tabba@google.com>
---
.../arm64/kvm/hyp/include/nvhe/fixed_config.h | 1 +
arch/arm64/kvm/hyp/include/nvhe/pkvm.h | 2 +
arch/arm64/kvm/hyp/nvhe/pkvm.c | 10 +++--
arch/arm64/kvm/hyp/nvhe/sys_regs.c | 44 +++++++++++++++++--
4 files changed, 51 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/kvm/hyp/include/nvhe/fixed_config.h b/arch/arm64/kvm/hyp/include/nvhe/fixed_config.h
index d1e59b88ff66..69e26d1a0ebe 100644
--- a/arch/arm64/kvm/hyp/include/nvhe/fixed_config.h
+++ b/arch/arm64/kvm/hyp/include/nvhe/fixed_config.h
@@ -201,6 +201,7 @@
u64 pvm_read_id_reg(const struct kvm_vcpu *vcpu, u32 id);
bool kvm_handle_pvm_sysreg(struct kvm_vcpu *vcpu, u64 *exit_code);
bool kvm_handle_pvm_restricted(struct kvm_vcpu *vcpu, u64 *exit_code);
+void kvm_init_pvm_id_regs(struct kvm_vcpu *vcpu);
int kvm_check_pvm_sysreg_table(void);
#endif /* __ARM64_KVM_FIXED_CONFIG_H__ */
diff --git a/arch/arm64/kvm/hyp/include/nvhe/pkvm.h b/arch/arm64/kvm/hyp/include/nvhe/pkvm.h
index 24a9a8330d19..698bc20ab80b 100644
--- a/arch/arm64/kvm/hyp/include/nvhe/pkvm.h
+++ b/arch/arm64/kvm/hyp/include/nvhe/pkvm.h
@@ -47,6 +47,8 @@ struct pkvm_hyp_vm {
struct pkvm_hyp_vcpu *vcpus[];
};
+extern hyp_spinlock_t vm_table_lock;
+
static inline struct pkvm_hyp_vm *
pkvm_hyp_vcpu_to_hyp_vm(struct pkvm_hyp_vcpu *hyp_vcpu)
{
diff --git a/arch/arm64/kvm/hyp/nvhe/pkvm.c b/arch/arm64/kvm/hyp/nvhe/pkvm.c
index 59ff6aac514c..3014f3295d81 100644
--- a/arch/arm64/kvm/hyp/nvhe/pkvm.c
+++ b/arch/arm64/kvm/hyp/nvhe/pkvm.c
@@ -257,10 +257,10 @@ static pkvm_handle_t idx_to_vm_handle(unsigned int idx)
/*
* Spinlock for protecting state related to the VM table. Protects writes
- * to 'vm_table' and 'nr_table_entries' as well as reads and writes to
- * 'last_hyp_vcpu_lookup'.
+ * to 'vm_table', 'nr_table_entries', and other per-vm state on initialization.
+ * Also protects reads and writes to 'last_hyp_vcpu_lookup'.
*/
-static DEFINE_HYP_SPINLOCK(vm_table_lock);
+DEFINE_HYP_SPINLOCK(vm_table_lock);
/*
* The table of VM entries for protected VMs in hyp.
@@ -381,6 +381,7 @@ static void init_pkvm_hyp_vm(struct kvm *host_kvm, struct pkvm_hyp_vm *hyp_vm,
hyp_vm->kvm.created_vcpus = nr_vcpus;
hyp_vm->kvm.arch.mmu.vtcr = host_mmu.arch.mmu.vtcr;
hyp_vm->kvm.arch.pkvm.enabled = READ_ONCE(host_kvm->arch.pkvm.enabled);
+ hyp_vm->kvm.arch.flags = 0;
pkvm_init_features_from_host(hyp_vm, host_kvm);
}
@@ -419,6 +420,9 @@ static int init_pkvm_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu,
hyp_vcpu->vcpu.arch.cflags = READ_ONCE(host_vcpu->arch.cflags);
hyp_vcpu->vcpu.arch.mp_state.mp_state = KVM_MP_STATE_STOPPED;
+ if (pkvm_hyp_vcpu_is_protected(hyp_vcpu))
+ kvm_init_pvm_id_regs(&hyp_vcpu->vcpu);
+
ret = pkvm_vcpu_init_traps(hyp_vcpu);
if (ret)
goto done;
diff --git a/arch/arm64/kvm/hyp/nvhe/sys_regs.c b/arch/arm64/kvm/hyp/nvhe/sys_regs.c
index 59fb2f056177..453a130b7a5d 100644
--- a/arch/arm64/kvm/hyp/nvhe/sys_regs.c
+++ b/arch/arm64/kvm/hyp/nvhe/sys_regs.c
@@ -204,8 +204,7 @@ static u64 get_pvm_id_aa64mmfr2(const struct kvm_vcpu *vcpu)
return id_aa64mmfr2_el1_sys_val & PVM_ID_AA64MMFR2_ALLOW;
}
-/* Read a sanitized cpufeature ID register by its encoding */
-u64 pvm_read_id_reg(const struct kvm_vcpu *vcpu, u32 id)
+static u64 pvm_calc_id_reg(const struct kvm_vcpu *vcpu, u32 id)
{
switch (id) {
case SYS_ID_AA64PFR0_EL1:
@@ -240,10 +239,25 @@ u64 pvm_read_id_reg(const struct kvm_vcpu *vcpu, u32 id)
}
}
+/* Read a sanitized cpufeature ID register by its encoding */
+u64 pvm_read_id_reg(const struct kvm_vcpu *vcpu, u32 id)
+{
+ return pvm_calc_id_reg(vcpu, id);
+}
+
static u64 read_id_reg(const struct kvm_vcpu *vcpu,
struct sys_reg_desc const *r)
{
- return pvm_read_id_reg(vcpu, reg_to_encoding(r));
+ struct kvm *kvm = vcpu->kvm;
+ u32 reg = reg_to_encoding(r);
+
+ if (WARN_ON_ONCE(!test_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &kvm->arch.flags)))
+ return 0;
+
+ if (reg >= sys_reg(3, 0, 0, 1, 0) && reg <= sys_reg(3, 0, 0, 7, 7))
+ return kvm->arch.id_regs[IDREG_IDX(reg)];
+
+ return 0;
}
/* Handler to RAZ/WI sysregs */
@@ -448,6 +462,30 @@ static const struct sys_reg_desc pvm_sys_reg_descs[] = {
/* Performance Monitoring Registers are restricted. */
};
+/*
+ * Initializes feature registers for protected vms.
+ */
+void kvm_init_pvm_id_regs(struct kvm_vcpu *vcpu)
+{
+ struct kvm *kvm = vcpu->kvm;
+ struct kvm_arch *ka = &kvm->arch;
+ u32 r;
+
+ hyp_assert_lock_held(&vm_table_lock);
+
+ if (test_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &kvm->arch.flags))
+ return;
+
+ /*
+ * Initialize only AArch64 id registers since AArch32 isn't supported
+ * for protected VMs.
+ */
+ for (r = sys_reg(3, 0, 0, 4, 0); r <= sys_reg(3, 0, 0, 7, 7); r += sys_reg(0, 0, 0, 0, 1))
+ ka->id_regs[IDREG_IDX(r)] = pvm_calc_id_reg(vcpu, r);
+
+ set_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &kvm->arch.flags);
+}
+
/*
* Checks that the sysreg table is unique and in-order.
*
--
2.47.1.613.gc27f4b7a9f-goog
next prev parent reply other threads:[~2024-12-16 10:51 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-16 10:50 [PATCH v5 00/17] KVM: arm64: Rework guest VM fixed feature handling and trapping in pKVM Fuad Tabba
2024-12-16 10:50 ` [PATCH v5 01/17] KVM: arm64: Consolidate allowed and restricted VM feature checks Fuad Tabba
2024-12-16 10:50 ` [PATCH v5 02/17] KVM: arm64: Group setting traps for protected VMs by control register Fuad Tabba
2024-12-16 10:50 ` [PATCH v5 03/17] KVM: arm64: Move checking protected vcpu features to a separate function Fuad Tabba
2024-12-16 10:50 ` [PATCH v5 04/17] KVM: arm64: Remove KVM_ARM_VCPU_POWER_OFF from protected VMs allowed features in pKVM Fuad Tabba
2024-12-16 10:50 ` [PATCH v5 05/17] KVM: arm64: Use KVM extension checks for allowed protected VM capabilities Fuad Tabba
2024-12-16 10:50 ` Fuad Tabba [this message]
2024-12-16 10:50 ` [PATCH v5 07/17] KVM: arm64: Fix RAS trapping in pKVM for protected VMs Fuad Tabba
2024-12-16 10:50 ` [PATCH v5 08/17] KVM: arm64: Set protected VM traps based on its view of feature registers Fuad Tabba
2024-12-16 10:50 ` [PATCH v5 09/17] KVM: arm64: Rework specifying restricted features for protected VMs Fuad Tabba
2024-12-16 10:50 ` [PATCH v5 10/17] KVM: arm64: Remove fixed_config.h header Fuad Tabba
2024-12-16 10:50 ` [PATCH v5 11/17] KVM: arm64: Remove redundant setting of HCR_EL2 trap bit Fuad Tabba
2024-12-16 10:50 ` [PATCH v5 12/17] KVM: arm64: Calculate cptr_el2 traps on activating traps Fuad Tabba
2024-12-16 10:50 ` [PATCH v5 13/17] KVM: arm64: Refactor kvm_reset_cptr_el2() Fuad Tabba
2024-12-16 10:50 ` [PATCH v5 14/17] KVM: arm64: Fix the value of the CPTR_EL2 RES1 bitmask for nVHE Fuad Tabba
2024-12-16 10:50 ` [PATCH v5 15/17] KVM: arm64: Remove PtrAuth guest vcpu flag Fuad Tabba
2024-12-16 10:50 ` [PATCH v5 16/17] KVM: arm64: Convert the SVE guest vcpu flag to a vm flag Fuad Tabba
2024-12-16 10:50 ` [PATCH v5 17/17] KVM: arm64: Use kvm_vcpu_has_feature() directly for struct kvm Fuad Tabba
2024-12-20 15:22 ` [PATCH v5 00/17] KVM: arm64: Rework guest VM fixed feature handling and trapping in pKVM Marc Zyngier
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