From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A79A72FD7DA for ; Thu, 19 Feb 2026 19:55:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771530948; cv=none; b=Vu7ivYO2RXGPPlWXiwUzyADttY+8f+PGiUneaG4ZKTUrFKETMB2mhRsd80xxcw11TdoIasYkrevPFbJKuGfWbkDRVB7uVLzWDc6yk0tez/o1NGh5gGMsQhaKJwoeeZICouMmq8NdPSAihux7hmoIZfjPR6TnfirFZNwdsb2bEp8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771530948; c=relaxed/simple; bh=lSnpk/U1VTCVk454WA0P8P36bHcCW2yZ27QlrwJHGtc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tDRapcQkxbfGIfImb0MU9Xv8CkGsLm60Flgph0FYIlg4M8qCtUQFfG9lO1y6AsQTa4nPxX4hZltUNlUoKizFYMqt+HTzVpLYzLsD6qu3rcU/C1r14tr91L2I4IEexTgA6jKSEqfeEXkW79V5G7GA4lEcj4ceIoiuCblHwc0YJ9k= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=qDRRbdsX; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="qDRRbdsX" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7C795C19424; Thu, 19 Feb 2026 19:55:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771530948; bh=lSnpk/U1VTCVk454WA0P8P36bHcCW2yZ27QlrwJHGtc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qDRRbdsX0VeyC7I7Gpnu/K4mPuV1FgLoV95n4lScmVuefGlvnJQ7dgKiYm1IQ51r3 9rhD5Ej76Kw7crOpCQ7WFy+30msL+dpIp3ieYU+Y01G0uznMlRsmOMM51rvWrE693x YAPb4WoCzAmlN4sZHKb/Ht5AGE8adQh8ISael5fqCcCI2nJ4Za2MKW+3aG+KsTUH8Y 1ljrhc8/HctRHoexLYM84Q54495rNYnE0JoLwHzy/EAEadfqfILPEz/Y7wuC8AcLuA hpfDY9XOmtSwEzARzPjSmrICNsTJPHryMg8x2kEQn1KfCrgPf7XGdeEKvsi/pAISlQ AxpWSh/mupuHA== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1vtA7m-0000000CGHL-2mZy; Thu, 19 Feb 2026 19:55:46 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev Cc: Fuad Tabba , Will Deacon , Catalin Marinas , Mark Rutland , Joey Gouly , Suzuki K Poulose , Oliver Upton , Zenghui Yu Subject: [PATCH 6/9] arm64: Convert CONFIG_ARM64_MTE to FTR_CONFIG() Date: Thu, 19 Feb 2026 19:55:29 +0000 Message-ID: <20260219195533.2455736-7-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260219195533.2455736-1-maz@kernel.org> References: <20260219195533.2455736-1-maz@kernel.org> Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, tabba@google.com, will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, joey.gouly@arm.com, suzuki.poulose@arm.com, oupton@kernel.org, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false While CONFIG_ARM64_MTE=n prevents userspace from using MTE, the sanitised ID registers still advertise the feature. Make it clear that nothing in the kernel should rely on this by marking the feature as hidden for all when CONFIG_ARM64_MTE=n. This is functionnaly equivalent to using arm64.nomte on the kernel command-line. Signed-off-by: Marc Zyngier --- arch/arm64/kernel/cpufeature.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index ca4aae48ace66..2b9d03c9564e6 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -314,7 +314,7 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr1[] = { FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_SME_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_MPAM_frac_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_RAS_frac_SHIFT, 4, 0), - ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_MTE), + ARM64_FTR_BITS(FTR_CONFIG(CONFIG_ARM64_MTE, VISIBLE, ALL_HIDDEN), FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_MTE_SHIFT, 4, ID_AA64PFR1_EL1_MTE_NI), ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_SSBS_SHIFT, 4, ID_AA64PFR1_EL1_SSBS_NI), ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_BTI), -- 2.47.3