Re: [PATCH v3 17/36] KVM: arm64: Support translation faults in inject_host_exception()

Fuad Tabba
2026-03-11T10:13:25Z

On Thu, 5 Mar 2026 at 14:45, Will Deacon <will@kernel.org> wrote:
>
> Extend inject_host_exception() to support the injection of translation
> faults on both the data and instruction side to 32-bit and 64-bit EL0
> as well as 64-bit EL1. This will be used in a subsequent patch when
> resolving an unhandled host stage-2 abort.
>
> Cc: Fuad Tabba <tabba@google.com>

Reviewed-by: Fuad Tabba <tabba@google.com>

Cheers,
/fuad

> Signed-off-by: Will Deacon <will@kernel.org>
> ---
> arch/arm64/kvm/hyp/include/nvhe/trap_handler.h | 2 ++
> arch/arm64/kvm/hyp/nvhe/hyp-main.c | 18 +++++++++++++++---
> 2 files changed, 17 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/kvm/hyp/include/nvhe/trap_handler.h b/arch/arm64/kvm/hyp/include/nvhe/trap_handler.h
> index ba5382c12787..32d7b7746e8e 100644
> --- a/arch/arm64/kvm/hyp/include/nvhe/trap_handler.h
> +++ b/arch/arm64/kvm/hyp/include/nvhe/trap_handler.h
> @@ -16,4 +16,6 @@
> __always_unused int ___check_reg_ ## reg; \
> type name = (type)cpu_reg(ctxt, (reg))
>
> +void inject_host_exception(u64 esr);
> +
> #endif /* __ARM64_KVM_NVHE_TRAP_HANDLER_H__ */
> diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/hyp-main.c
> index adfc0bc15398..6db5aebd92dc 100644
> --- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c
> +++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c
> @@ -705,15 +705,24 @@ static void handle_host_smc(struct kvm_cpu_context *host_ctxt)
> kvm_skip_host_instr();
> }
>
> -static void inject_host_exception(u64 esr)
> +void inject_host_exception(u64 esr)
> {
> u64 sctlr, spsr_el1, spsr_el2, exc_offset = except_type_sync;
> const u64 spsr_mask = PSR_N_BIT | PSR_Z_BIT | PSR_C_BIT |
> PSR_V_BIT | PSR_DIT_BIT | PSR_PAN_BIT;
>
> - exc_offset += CURRENT_EL_SP_ELx_VECTOR;
> -
> spsr_el1 = spsr_el2 = read_sysreg_el2(SYS_SPSR);
> + switch (spsr_el1 & (PSR_MODE_MASK | PSR_MODE32_BIT)) {
> + case PSR_MODE_EL0t:
> + exc_offset += LOWER_EL_AArch64_VECTOR;
> + break;
> + case PSR_MODE_EL0t | PSR_MODE32_BIT:
> + exc_offset += LOWER_EL_AArch32_VECTOR;
> + break;
> + default:
> + exc_offset += CURRENT_EL_SP_ELx_VECTOR;
> + }
> +
> spsr_el2 &= spsr_mask;
> spsr_el2 |= PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT |
> PSR_MODE_EL1h;
> @@ -728,6 +737,9 @@ static void inject_host_exception(u64 esr)
> if (system_supports_mte())
> spsr_el2 |= PSR_TCO_BIT;
>
> + if (esr_fsc_is_translation_fault(esr))
> + write_sysreg_el1(read_sysreg_el2(SYS_FAR), SYS_FAR);
> +
> write_sysreg_el1(esr, SYS_ESR);
> write_sysreg_el1(read_sysreg_el2(SYS_ELR), SYS_ELR);
> write_sysreg_el1(spsr_el1, SYS_SPSR);
> --
> 2.53.0.473.g4a7958ca14-goog
>