[PATCH v6 00/39] KVM: arm64: Introduce vGIC-v5 with PPI support

Sascha Bischoff
2026-03-17T11:41:12Z

This is v6 of the patch series to add the virtual GICv5 [1] device
(vgic_v5). Only PPIs are supported by this initial series, and the
vgic_v5 implementation is restricted to the CPU interface,
only. Further patch series are to follow in due course, and will add
support for SPIs, LPIs, the GICv5 IRS, and the GICv5 ITS.

v1, v2, v3, v4, and v5 of this series can be found at [2], [3], [4],
[5], [6], respectively.

Headline changes since v5:

* Reworked all of the PPI state manipulation (with the exception of
PPI priorities) to use bitmaps rather than u64 arrays which were
mapped onto registers. This allows us to manipulate the state much
more elegantly. PPI priority state was not included in this as we
have 8-bits per PPI, so using a bitmap is not helpful here.

* Reduced the number of supported PPIs in KVM from 128 to 64, meaning
that we only support the architected set and not the impdef
set. Given that we only expose the SW_PPI, PMUIRQ, and the timer
PPIs to a guest we were handling a lot of state that never got
used. If the impdef set of PPIs are required in the future, it is
just a case of bumping the number of PPIs back up to 128 - the code
is parameterised based on the value now that we use bitmaps.

* Updated the core vgic code to use switch statements rather than
if-else constructs, where appropriate. This is more readable, and
maintainable, if more verbose. vgic_restore_state() and
vgic_save_state() are the exception as the logic becomes rather
convoluted quickly, and comments have been included to explain
why. In short, the __vgic_v3_*_state() functions need to be called
in many different situations, resulting in a complex mess of nested
switch and if-else statements.

* Introduced some vgic_v5_* helpers to manipulate IntIDs to either
extract the ID and type, or to build a GICv5-style IntID. These have
been worked into the appropriate places.

* Moved the vgic_is_v3() from vgic.h helper to live in arm_vgic.h,
alongside the vgic_is_v5() one. Both are now implemented as macros,
whereas previously one was a macro and the other was a static inline
function.

* Separated mapping/unmapping of irqs from setting/clearing the
irq_ops. We rely on some functions being overridden via irq_ops for
GICv5, and previously the act of unmapping an irq was
indiscriminately clearing them. While this is not an issue for
non-nested operation as irqs are not dynamically unmapped, this
would have gone very, very wrong with nested virt for GICv5. Now
mapping/unmapping ONLY handles what the name suggests, and the
setting/clearing of irq_ops is explicitly handled via
kvm_vgic_set_irq_ops() and kvm_vgic_clear_irq_ops(). This results in
some extra code, but avoids conflating the two mechanisms.

* Introduced a set_direct_injection() irq_op, and reimplemented the
GICv5 PPI DVI mechanism to use this. This keeps the core vgic
mapping/unmapping code free of special case handling for GICv5. As
part of this, also dropped the directly_injected flag from struct
vgic_irq as it was no longer used or useful.

* Dropped the hypercall for __vgic_v5_save_ppi_state() and
__vgic_v5_restore_ppi_state() as these functions are only ever
called directly by the relevant VHE/NVHE code, meaning that the
hypercall itself was never used.

* General clean-up some some of the commit messages to more accurately
document the commits.

These changes are based on v7.0-rc4. I have pushed these changes to a
branch that can be found at [7].

Thanks all for the feedback! As always, it is greatly appreciated.

Sascha

[1] https://developer.arm.com/documentation/aes0070/latest
[2] https://lore.kernel.org/all/20251212152215.675767-1-sascha.bischoff@arm.com/
[3] https://lore.kernel.org/all/20251219155222.1383109-1-sascha.bischoff@arm.com/
[4] https://lore.kernel.org/all/20260109170400.1585048-1-sascha.bischoff@arm.com/
[5] https://lore.kernel.org/all/20260128175919.3828384-1-sascha.bischoff@arm.com/
[6] https://lore.kernel.org/all/20260226155515.1164292-1-sascha.bischoff@arm.com/
[7] https://gitlab.arm.com/linux-arm/linux-sb/-/tree/gicv5_ppi_support_v6

Sascha Bischoff (39):
KVM: arm64: vgic-v3: Drop userspace write sanitization for
ID_AA64PFR0.GIC on GICv5
KVM: arm64: vgic: Rework vgic_is_v3() and add vgic_host_has_gicvX()
KVM: arm64: Return early from kvm_finalize_sys_regs() if guest has run
KVM: arm64: vgic: Split out mapping IRQs and setting irq_ops
arm64/sysreg: Add remaining GICv5 ICC_ & ICH_ sysregs for KVM support
arm64/sysreg: Add GICR CDNMIA encoding
KVM: arm64: gic-v5: Add ARM_VGIC_V5 device to KVM headers
KVM: arm64: gic: Introduce interrupt type helpers
KVM: arm64: gic-v5: Add Arm copyright header
KVM: arm64: gic-v5: Detect implemented PPIs on boot
KVM: arm64: gic-v5: Sanitize ID_AA64PFR2_EL1.GCIE
KVM: arm64: gic-v5: Support GICv5 FGTs & FGUs
KVM: arm64: gic-v5: Add emulation for ICC_IAFFIDR_EL1 accesses
KVM: arm64: gic-v5: Trap and emulate ICC_IDR0_EL1 accesses
KVM: arm64: gic-v5: Add vgic-v5 save/restore hyp interface
KVM: arm64: gic-v5: Implement GICv5 load/put and save/restore
KVM: arm64: gic-v5: Finalize GICv5 PPIs and generate mask
KVM: arm64: gic: Introduce queue_irq_unlock to irq_ops
KVM: arm64: gic-v5: Implement PPI interrupt injection
KVM: arm64: gic-v5: Init Private IRQs (PPIs) for GICv5
KVM: arm64: gic-v5: Clear TWI if single task running
KVM: arm64: gic-v5: Check for pending PPIs
KVM: arm64: gic-v5: Trap and mask guest ICC_PPI_ENABLERx_EL1 writes
KVM: arm64: Introduce set_direct_injection irq_op
KVM: arm64: gic-v5: Implement direct injection of PPIs
KVM: arm64: gic-v5: Support GICv5 interrupts with KVM_IRQ_LINE
KVM: arm64: gic-v5: Create and initialise vgic_v5
KVM: arm64: gic-v5: Initialise ID and priority bits when resetting
vcpu
KVM: arm64: gic-v5: Enlighten arch timer for GICv5
KVM: arm64: gic-v5: Mandate architected PPI for PMU emulation on GICv5
KVM: arm64: gic: Hide GICv5 for protected guests
KVM: arm64: gic-v5: Hide FEAT_GCIE from NV GICv5 guests
KVM: arm64: gic-v5: Introduce kvm_arm_vgic_v5_ops and register them
KVM: arm64: gic-v5: Set ICH_VCTLR_EL2.En on boot
KVM: arm64: gic-v5: Probe for GICv5 device
Documentation: KVM: Introduce documentation for VGICv5
KVM: arm64: gic-v5: Communicate userspace-driveable PPIs via a UAPI
KVM: arm64: selftests: Introduce a minimal GICv5 PPI selftest
KVM: arm64: selftests: Add no-vgic-v5 selftest

Documentation/virt/kvm/api.rst | 6 +-
.../virt/kvm/devices/arm-vgic-v5.rst | 50 ++
Documentation/virt/kvm/devices/index.rst | 1 +
Documentation/virt/kvm/devices/vcpu.rst | 5 +-
arch/arm64/include/asm/el2_setup.h | 2 +
arch/arm64/include/asm/kvm_asm.h | 2 +
arch/arm64/include/asm/kvm_host.h | 34 ++
arch/arm64/include/asm/kvm_hyp.h | 10 +
arch/arm64/include/asm/sysreg.h | 7 +
arch/arm64/include/asm/vncr_mapping.h | 3 +
arch/arm64/include/uapi/asm/kvm.h | 1 +
arch/arm64/kvm/arch_timer.c | 132 ++++-
arch/arm64/kvm/arm.c | 44 +-
arch/arm64/kvm/config.c | 123 ++++-
arch/arm64/kvm/emulate-nested.c | 68 +++
arch/arm64/kvm/hyp/include/hyp/switch.h | 27 +
arch/arm64/kvm/hyp/nvhe/Makefile | 2 +-
arch/arm64/kvm/hyp/nvhe/hyp-main.c | 16 +
arch/arm64/kvm/hyp/nvhe/switch.c | 15 +
arch/arm64/kvm/hyp/nvhe/sys_regs.c | 8 +
arch/arm64/kvm/hyp/vgic-v5-sr.c | 166 ++++++
arch/arm64/kvm/hyp/vhe/Makefile | 2 +-
arch/arm64/kvm/nested.c | 5 +
arch/arm64/kvm/pmu-emul.c | 20 +-
arch/arm64/kvm/sys_regs.c | 176 ++++++-
arch/arm64/kvm/vgic/vgic-init.c | 213 +++++---
arch/arm64/kvm/vgic/vgic-kvm-device.c | 107 +++-
arch/arm64/kvm/vgic/vgic-mmio.c | 40 +-
arch/arm64/kvm/vgic/vgic-v3.c | 2 +-
arch/arm64/kvm/vgic/vgic-v5.c | 492 +++++++++++++++++-
arch/arm64/kvm/vgic/vgic.c | 184 +++++--
arch/arm64/kvm/vgic/vgic.h | 53 +-
arch/arm64/tools/sysreg | 480 +++++++++++++++++
include/kvm/arm_arch_timer.h | 11 +-
include/kvm/arm_pmu.h | 5 +-
include/kvm/arm_vgic.h | 191 ++++++-
include/linux/irqchip/arm-gic-v5.h | 27 +
include/linux/kvm_host.h | 1 +
include/uapi/linux/kvm.h | 2 +
tools/arch/arm64/include/uapi/asm/kvm.h | 1 +
tools/include/uapi/linux/kvm.h | 2 +
tools/testing/selftests/kvm/Makefile.kvm | 3 +-
.../testing/selftests/kvm/arm64/no-vgic-v3.c | 177 -------
tools/testing/selftests/kvm/arm64/no-vgic.c | 297 +++++++++++
tools/testing/selftests/kvm/arm64/vgic_v5.c | 228 ++++++++
.../selftests/kvm/include/arm64/gic_v5.h | 150 ++++++
46 files changed, 3209 insertions(+), 382 deletions(-)
create mode 100644 Documentation/virt/kvm/devices/arm-vgic-v5.rst
create mode 100644 arch/arm64/kvm/hyp/vgic-v5-sr.c
delete mode 100644 tools/testing/selftests/kvm/arm64/no-vgic-v3.c
create mode 100644 tools/testing/selftests/kvm/arm64/no-vgic.c
create mode 100644 tools/testing/selftests/kvm/arm64/vgic_v5.c
create mode 100644 tools/testing/selftests/kvm/include/arm64/gic_v5.h

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2.34.1