From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4E72337E304 for ; Sun, 26 Jul 2026 15:35:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=170.10.133.124 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785080117; cv=none; b=OhpFoJeyFn8hP3m33qn+D1LlM6grmIG2bwFNyJmw0ijZ/GUxcKcWNv9agsXm3m1RN7v/dkxE4SVMrYdlnRsPaDr64+f6aN8E4Zuhf86ray2h0g+eCnnEnBCMHm3YBeOpUwGPFVCoBuB2H2gTzjl8gwc3GYQYrZAPp0JLDz7/vr0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785080117; c=relaxed/simple; bh=BeHAmBeHzR4h6PuAzQEU+wvhXtnihxAZcy7Vd3cc+0w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:content-type; b=Wpgdz1l9j0ly+5TfUGgSzP5DkSlfn95Qd4g6HGP6B4snuOdRbM8234uyNNksZZLCZO5o4Ehtit8BbF8OojvEyF4JZZI8OQPX7bPcy3AsHi0R5z/4sCtuNQIDUf1kR5NUH8qA0UMO9BFUzGLnjLX5FGpKqzdOBwHzVOVxU6kMPoo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com; spf=pass smtp.mailfrom=redhat.com; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b=Pkll5F0j; arc=none smtp.client-ip=170.10.133.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="Pkll5F0j" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1785080115; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JxxlxorpYZytrBVrMewiRqi3C0JU4N4AWnQGksnrZUQ=; b=Pkll5F0jkn+41HfmzFxuWfKQ5e2vWEEJJsIIJNOxKt4y57VIUe0sW8VcZA7pMidsfWlGV3 5zLsdPGmK3SRiDymSGR+BkekIiZHUM49T5Lj8c1kpZ6Q15R9a+Hp4LEn/nCgkT89Y+ibAi KELgvvud+9BdGTd9VtaEfnDzQRIooCE= Received: from mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-556-7AUyfskuOcm5mwgd1J5iuA-1; Sun, 26 Jul 2026 11:35:11 -0400 X-MC-Unique: 7AUyfskuOcm5mwgd1J5iuA-1 X-Mimecast-MFC-AGG-ID: 7AUyfskuOcm5mwgd1J5iuA_1785080109 Received: from mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.111]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id B3E751800676; Sun, 26 Jul 2026 15:35:09 +0000 (UTC) Received: from laptop.redhat.com (unknown [10.44.32.63]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 502ED1800613; Sun, 26 Jul 2026 15:35:01 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, kvmarm@lists.linux.dev, peter.maydell@linaro.org, shaju.abraham@nutanix.com, khushit.shah@nutanix.com, yangjinqian1@huawei.com, cohuck@redhat.com, richard.henderson@linaro.org, sebott@redhat.com, skolothumtho@nvidia.com, philmd@oss.qualcomm.com Cc: maz@kernel.org, oliver.upton@linux.dev, pbonzini@redhat.com, armbru@redhat.com, berrange@redhat.com, abologna@redhat.com, jdenemar@redhat.com Subject: [RFC PATCH v7 15/18] target/arm/kvm: Ignore and trace unexpected writable reserved fields Date: Sun, 26 Jul 2026 17:29:53 +0200 Message-ID: <20260726153221.24773-16-eric.auger@redhat.com> In-Reply-To: <20260726153221.24773-1-eric.auger@redhat.com> References: <20260726153221.24773-1-eric.auger@redhat.com> Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 X-Mimecast-MFC-PROC-ID: 0KEPkn0s1CSQ6RDXSUXkLO1y4ogPyeJ-IaX074Fj6Sk_1785080109 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: 8bit content-type: text/plain; charset="US-ASCII"; x-default=true KVM currently reports some bits as writable whereas they are RES0 or RAZ. The code easily allows to do some sanity checking for such inconsistencies. Let's add a trace event when this is encountered and skip the field Signed-off-by: Eric Auger --- target/arm/kvm.c | 8 ++++++++ target/arm/trace-events | 1 + 2 files changed, 9 insertions(+) diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 1a78893f87..fceffee262 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -434,6 +434,14 @@ decode_idreg_writemap(Object *obj, ARM64SysReg *reg) } lower = field->shift; upper = field->shift + field->length - 1; + + /* Sanity check the field is not a reserved field */ + if (strstr(field->name, "RES0") || strstr(field->name, "RES1") || + strstr(field->name, "RAZ")) { + trace_unexpected_writable_reserved_field(reg->name, field->name, + lower, upper); + continue; + } prop_name = g_strdup_printf("SYSREG_%s_%s", reg->name, field->name); trace_decode_idreg_writemap(field->name, lower, upper, prop_name); object_property_add(obj, prop_name, "uint64", diff --git a/target/arm/trace-events b/target/arm/trace-events index d72ad6b671..e67730de6b 100644 --- a/target/arm/trace-events +++ b/target/arm/trace-events @@ -19,6 +19,7 @@ decode_idreg_writemap(const char* name, int lower, int upper, char *prop_name) " get_sysreg_prop(const char *name, uint64_t value) "%s 0x%"PRIx64 set_sysreg_prop(const char *name, uint64_t old, uint64_t mask, uint64_t field_value, uint64_t new) "%s old reg value=0x%"PRIx64" mask=0x%"PRIx64" new field value=0x%"PRIx64" new reg value=0x%"PRIx64 nb_sysreg_props(const char *name, int count) "%s: %d SYSREG properties" +unexpected_writable_reserved_field(const char *reg_name, const char *field_name, int lower, int upper) "Unexpected writable reserved field: %s.%s [%d,%d], skip it ..." # cpu.c arm_cpu_reset(uint64_t mp_aff) "cpu %" PRIu64 -- 2.53.0