Linux KVM/arm64 development list
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Fuad Tabba" <fuad.tabba@linux.dev>
Cc: kvmarm@lists.linux.dev, "Oliver Upton" <oupton@kernel.org>,
	"Marc Zyngier" <maz@kernel.org>
Subject: Re: [PATCH v7 8/8] KVM: arm64: Implement lazy vCPU state sync for non-protected guests
Date: Wed, 29 Jul 2026 13:36:00 +0000	[thread overview]
Message-ID: <20260729133600.ABD741F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260729131823.2021516-9-fuad.tabba@linux.dev>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Missing HCR_EL2 state synchronization breaks virtual SError injection, causing an infinite exception loop.
- [High] Lazy state sync fails to flush context after KVM_REQ_VCPU_RESET, causing vCPU resets (e.g., PSCI CPU_ON) to be ignored.
--

--- Patch [8]: [PATCH v7 8/8] KVM: arm64: Implement lazy vCPU state sync for non-protected guests ---
commit 80df5c4ca2cca0a1726813fa129b353353482892
Author: Fuad Tabba <fuad.tabba@linux.dev>

KVM: arm64: Implement lazy vCPU state sync for non-protected guests

This commit optimizes world switches for non-protected guests by deferring
the copy of the vCPU register context between the host and hypervisor.
State is now only synced on entry if marked dirty, and on exit only when
explicitly needed by the host.

> diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c
> --- a/arch/arm64/kvm/handle_exit.c
> +++ b/arch/arm64/kvm/handle_exit.c
> @@ -486,9 +486,32 @@ int handle_exit(struct kvm_vcpu *vcpu, int exception_index)
>  	}
>  }
>  
> +static void handle_exit_pkvm_state(struct kvm_vcpu *vcpu, int exception_index)
> +{
> +	int exception_code = ARM_EXCEPTION_CODE(exception_index);
> +
> +	if (!is_protected_kvm_enabled() || kvm_vm_is_protected(vcpu->kvm))
> +		return;
> +
> +	/*
> +	 * Sync the context back when the host will read (trap) or write
> +	 * (SError) it. Preempt-off here, so the loaded hyp vCPU is stable.
> +	 */
> +	if (exception_code == ARM_EXCEPTION_TRAP ||
> +	    exception_code == ARM_EXCEPTION_EL1_SERROR ||
> +	    ARM_SERROR_PENDING(exception_index)) {
> +		kvm_call_hyp_nvhe(__pkvm_vcpu_sync_state);
> +		vcpu_set_flag(vcpu, PKVM_HOST_STATE_DIRTY);
> +	} else {
> +		vcpu_clear_flag(vcpu, PKVM_HOST_STATE_DIRTY);

[Severity: High]
Is it possible for KVM_REQ_VCPU_RESET updates to be ignored due to this
cleared flag?

If a secondary vCPU is powered on (for example, via PSCI CPU_ON), it
receives KVM_REQ_VCPU_RESET and gets kicked, leading to an exit with an
IRQ. Since that exit takes this else branch and clears the dirty flag,
and the reset request is processed afterward in kvm_vcpu_check_requests()
which modifies the host-side vCPU context, wouldn't flush_hyp_vcpu() skip
syncing this updated reset state because the flag remains cleared?

This could result in the target vCPU resuming with its pre-IRQ stale
context, eventually overwriting the new reset state on the next exit.

> +	}
> +}
> +

[ ... ]

> diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/hyp-main.c
> --- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c
> +++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c
> @@ -203,9 +255,16 @@ static void sync_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu)
>  	fpsimd_sve_sync(&hyp_vcpu->vcpu);
>  	sync_debug_state(hyp_vcpu);
>  
> -	host_vcpu->arch.ctxt		= hyp_vcpu->vcpu.arch.ctxt;
> -
> -	host_vcpu->arch.hcr_el2		= hyp_vcpu->vcpu.arch.hcr_el2;

[Severity: High]
Does removing this HCR_EL2 assignment break virtual SError injection and
cause an infinite exception loop?

When the host injects a virtual SError into a non-protected guest under
pKVM by setting HCR_VSE in the host-side vcpu->arch.hcr_el2, the hardware
automatically clears the VSE bit in the physical HCR_EL2 register once the
guest takes the exception.

Without syncing this hardware-cleared state back to the host here, the
host's HCR_VSE bit remains set. On the next entry, flush_hyp_vcpu() will
repeatedly re-inject the stale HCR_VSE bit from the host into the hyp vCPU,
locking up the guest.

> +	if (pkvm_hyp_vcpu_is_protected(hyp_vcpu)) {
> +		host_vcpu->arch.ctxt = hyp_vcpu->vcpu.arch.ctxt;
> +	} else {
> +		/*
> +		 * PC feeds trace_kvm_exit(), PSTATE.SS the host software-step
> +		 * machine, and both run before the next on-demand ctxt sync.
> +		 */
> +		host_vcpu->arch.ctxt.regs.pc = hyp_vcpu->vcpu.arch.ctxt.regs.pc;
> +		host_vcpu->arch.ctxt.regs.pstate = hyp_vcpu->vcpu.arch.ctxt.regs.pstate;
> +	}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260729131823.2021516-1-fuad.tabba@linux.dev?part=8

  reply	other threads:[~2026-07-29 13:36 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-29 13:18 [PATCH v7 0/8] KVM: arm64: pKVM vCPU state management at EL2 Fuad Tabba
2026-07-29 13:18 ` [PATCH v7 1/8] KVM: arm64: Extract MPIDR computation into a shared header Fuad Tabba
2026-07-29 13:18 ` [PATCH v7 2/8] KVM: arm64: Make vcpu_{read,write}_sys_reg available to HYP code Fuad Tabba
2026-07-29 13:34   ` sashiko-bot
2026-07-29 13:40     ` Fuad Tabba
2026-07-29 13:52   ` Joey Gouly
2026-07-29 14:51     ` Fuad Tabba
2026-07-29 13:18 ` [PATCH v7 3/8] KVM: arm64: Factor out reusable vCPU reset helpers Fuad Tabba
2026-07-29 13:18 ` [PATCH v7 4/8] KVM: arm64: Move PSCI helper functions to a shared header Fuad Tabba
2026-07-29 13:31   ` sashiko-bot
2026-07-29 13:33     ` Fuad Tabba
2026-07-29 13:18 ` [PATCH v7 5/8] KVM: arm64: Add host and hypervisor vCPU lookup primitives Fuad Tabba
2026-07-29 13:18 ` [PATCH v7 6/8] KVM: arm64: Minimise EL2's exposure of host VGIC state during world switch Fuad Tabba
2026-07-29 13:39   ` sashiko-bot
2026-07-29 13:44     ` Fuad Tabba
2026-07-29 13:18 ` [PATCH v7 7/8] KVM: arm64: Add primitives to flush/sync the VGIC state at EL2 Fuad Tabba
2026-07-29 13:18 ` [PATCH v7 8/8] KVM: arm64: Implement lazy vCPU state sync for non-protected guests Fuad Tabba
2026-07-29 13:36   ` sashiko-bot [this message]
2026-07-29 13:46     ` Fuad Tabba
2026-07-31 18:51 ` [PATCH v7 0/8] KVM: arm64: pKVM vCPU state management at EL2 Oliver Upton

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260729133600.ABD741F000E9@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=fuad.tabba@linux.dev \
    --cc=kvmarm@lists.linux.dev \
    --cc=maz@kernel.org \
    --cc=oupton@kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox