From: sashiko-bot@kernel.org
To: "Fuad Tabba" <fuad.tabba@linux.dev>
Cc: kvmarm@lists.linux.dev, "Oliver Upton" <oupton@kernel.org>,
"Marc Zyngier" <maz@kernel.org>
Subject: Re: [PATCH v1 1/4] KVM: arm64: Validate the host-provided vgic model in pKVM
Date: Thu, 06 Aug 2026 10:32:06 +0000 [thread overview]
Message-ID: <20260806103207.013201F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260806100256.371164-2-fuad.tabba@linux.dev>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
Pre-existing issues:
- [Critical] Unconditional copy of the host's mdcr_el2 to the protected VM's mdcr_el2 allows the host to reconfigure the guest's secure trap environment.
- [Medium] The patch fails to sanitize the explicit `__vgic_v5_save_apr` and `__vgic_v5_restore_vmcr_apr` hypercalls, allowing a malicious host to still panic the hypervisor on GICv3 machines.
--
--- Patch [1]: [PATCH v1 1/4] KVM: arm64: Validate the host-provided vgic model in pKVM ---
commit 3364f007874647c1650c3fc747633d9c5c9b87de
Author: Fuad Tabba <fuad.tabba@linux.dev>
KVM: arm64: Validate the host-provided vgic model in pKVM
This commit validates the host-provided vgic_model during initialization
of a protected VM, ensuring only GICv2 and GICv3 models are permitted.
This prevents a malicious host from causing a hypervisor panic by setting
the model to GICv5 on a GICv3 machine.
> diff --git a/arch/arm64/kvm/hyp/nvhe/pkvm.c b/arch/arm64/kvm/hyp/nvhe/pkvm.c
> index 24d6f164129ac..59bb15efdca42 100644
> --- a/arch/arm64/kvm/hyp/nvhe/pkvm.c
> +++ b/arch/arm64/kvm/hyp/nvhe/pkvm.c
> @@ -340,13 +340,25 @@ static void pkvm_init_features_from_host(struct pkvm_hyp_vm *hyp_vm, const struc
> {
[ ... ]
> - /* Preserve the vgic model so that GICv3 emulation works */
> - hyp_vm->kvm.arch.vgic.vgic_model = host_kvm->arch.vgic.vgic_model;
> + /*
> + * Preserve the vgic model for GICv3 emulation, but only what pKVM can
> + * run: the GICv5 world switch touches registers UNDEFINED at EL2
> + * without FEAT_GCIE. 0 is not a valid kvm_device_type: "no vgic".
> + */
> + switch (vgic_model) {
> + case KVM_DEV_TYPE_ARM_VGIC_V2:
> + case KVM_DEV_TYPE_ARM_VGIC_V3:
> + break;
> + default:
> + vgic_model = 0;
> + }
> + hyp_vm->kvm.arch.vgic.vgic_model = vgic_model;
[Severity: Medium]
This is a pre-existing issue, but does this validation fully prevent a
malicious host from triggering a GICv5 panic?
Even with the model restricted here, the explicit GICv5 hypercalls
remain unconditionally exposed in the always-on band:
arch/arm64/kvm/hyp/nvhe/hyp-main.c:
static void handle___vgic_v5_save_apr(struct kvm_cpu_context *host_ctxt)
{
DECLARE_REG(struct vgic_v5_cpu_if *, cpu_if, host_ctxt, 1);
__vgic_v5_save_apr(kern_hyp_va(cpu_if));
}
static void handle___vgic_v5_restore_vmcr_apr(struct kvm_cpu_context *host_ctxt)
{
DECLARE_REG(struct vgic_v5_cpu_if *, cpu_if, host_ctxt, 1);
__vgic_v5_restore_vmcr_apr(kern_hyp_va(cpu_if));
}
Can a compromised host still bypass this vgic_model sanitization by
directly executing the HVC instruction for
__KVM_HOST_SMCCC_FUNC___vgic_v5_save_apr or __vgic_v5_restore_vmcr_apr?
If these directly access GICv5 registers, wouldn't this still trigger an
UNDEFINED exception on machines without FEAT_GCIE?
> /* No restrictions for non-protected VMs. */
> if (!kvm_vm_is_protected(kvm)) {
[ ... ]
Additionally, while reviewing the protected guest state handling, I noticed
another potential issue in the hypervisor main loop:
arch/arm64/kvm/hyp/nvhe/hyp-main.c:flush_hyp_vcpu() {
...
/* __hyp_running_vcpu must be NULL in a guest context. */
hyp_vcpu->vcpu.arch.ctxt.__hyp_running_vcpu = NULL;
hyp_vcpu->vcpu.arch.mdcr_el2 = host_vcpu->arch.mdcr_el2;
/*
* HCR_EL2.VSE is host-owned (a pending virtual SError to inject), not a
...
}
[Severity: Critical]
This isn't a bug introduced by this patch, but does this unconditional
assignment allow the untrusted host to clobber the securely initialized
MDCR_EL2 configuration of protected guests on every VCPU entry?
Since flush_hyp_vcpu() overwrites the hyp vCPU's mdcr_el2 with the
host-controlled host_vcpu->arch.mdcr_el2, could a compromised host use
this to reconfigure the performance monitor (TPM) and debug (TDA/TDE)
trap environment of a protected guest?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260806100256.371164-1-fuad.tabba@linux.dev?part=1
next prev parent reply other threads:[~2026-08-06 10:32 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-06 10:02 [PATCH v1 0/4] KVM: arm64: Fix unguarded GICv5 CPU interface accesses Fuad Tabba
2026-08-06 10:02 ` [PATCH v1 1/4] KVM: arm64: Validate the host-provided vgic model in pKVM Fuad Tabba
2026-08-06 10:32 ` sashiko-bot [this message]
2026-08-06 10:40 ` Fuad Tabba
2026-08-07 9:56 ` Sascha Bischoff
2026-08-07 10:14 ` Fuad Tabba
2026-08-06 10:02 ` [PATCH v1 2/4] KVM: arm64: Reject the GICv5 CPU interface hypercalls under pKVM Fuad Tabba
2026-08-06 10:20 ` sashiko-bot
2026-08-06 10:36 ` Fuad Tabba
2026-08-06 10:02 ` [PATCH v1 3/4] KVM: arm64: vgic: Do not access the GICv5 CPU interface from EL1 Fuad Tabba
2026-08-06 10:15 ` sashiko-bot
2026-08-06 10:28 ` Fuad Tabba
2026-08-06 10:02 ` [PATCH v1 4/4] KVM: arm64: Fix stale VGICv3 comments in the nVHE world switch Fuad Tabba
2026-08-07 10:07 ` [PATCH v1 0/4] KVM: arm64: Fix unguarded GICv5 CPU interface accesses Sascha Bischoff
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260806103207.013201F000E9@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=fuad.tabba@linux.dev \
--cc=kvmarm@lists.linux.dev \
--cc=maz@kernel.org \
--cc=oupton@kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox