From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org
Cc: Steffen Eiden <seiden@linux.ibm.com>,
Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oupton@kernel.org>,
Zenghui Yu <yuzenghui@huawei.com>,
Fuad Tabba <fuad.tabba@linux.dev>,
Sascha Bischoff <sascha.bischoff@arm.com>
Subject: [PATCH 4/4] KVM: arm64: vgic-v5: Correctly handle host ISTE __le32 conversion
Date: Sat, 19 Sep 2026 13:31:50 +0100 [thread overview]
Message-ID: <20260919123150.3283606-5-maz@kernel.org> (raw)
In-Reply-To: <20260919123150.3283606-1-maz@kernel.org>
The vgic-v5 defines the host ISTE (h_iste) as a __le32, but uses
get_user/put_user on a userspace buffer declared as u32 *. This leads to
sparse having yet another fit.
Instead, define h_iste as a u32, and perform the conversion at the point
of doing the access on the architectural state.
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202609191215.to1MBYak-lkp@intel.com/
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kvm/vgic/vgic-v5-tables.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/kvm/vgic/vgic-v5-tables.c b/arch/arm64/kvm/vgic/vgic-v5-tables.c
index 2c8d0f360506c..aae5cf05f3907 100644
--- a/arch/arm64/kvm/vgic/vgic-v5-tables.c
+++ b/arch/arm64/kvm/vgic/vgic-v5-tables.c
@@ -1457,7 +1457,6 @@ static int vgic_v5_get_lpi_ist_desc(struct kvm *kvm,
static int vgic_v5_save_linear_ist(const struct vgic_v5_ist_desc *ist,
u32 __user *uaddr, size_t nr_entries)
{
- __le32 h_iste;
size_t index;
int ret;
@@ -1466,8 +1465,9 @@ static int vgic_v5_save_linear_ist(const struct vgic_v5_ist_desc *ist,
for (index = 0; index < nr_entries; index++) {
__le32 *h_iste_addr = ist->base + index * ist->iste_size;
+ u32 h_iste;
- h_iste = READ_ONCE(*h_iste_addr);
+ h_iste = le32_to_cpu(READ_ONCE(*h_iste_addr));
ret = put_user(h_iste, uaddr);
if (ret)
return ret;
@@ -1520,7 +1520,7 @@ static int vgic_v5_save_two_level_ist(const struct vgic_v5_ist_desc *ist,
h_iste = *(__le32 *)(h_l2_ist_base +
h_l2_index * ist->iste_size);
- ret = put_user(h_iste, uaddr);
+ ret = put_user(le32_to_cpu(h_iste), uaddr);
if (ret)
return ret;
@@ -1710,19 +1710,19 @@ static int vgic_v5_restore_linear_ist(struct kvm *kvm,
u32 __user *uaddr, size_t nr_entries,
u32 intid_type)
{
- __le32 h_iste;
size_t index;
int ret;
for (index = 0; index < nr_entries; index++) {
void *h_iste_addr = ist->base + index * ist->iste_size;
+ u32 h_iste;
ret = get_user(h_iste, uaddr);
if (ret)
return ret;
ret = vgic_v5_restore_ist_entry(kvm, ist, h_iste_addr,
- h_iste, index, intid_type);
+ cpu_to_le32(h_iste), index, intid_type);
if (ret)
return ret;
@@ -1744,7 +1744,6 @@ static int vgic_v5_restore_two_level_ist(struct kvm *kvm,
struct vgic_v5_two_level_ist_shape shape;
size_t h_l1_index, h_l2_index;
void *h_l2_ist_base;
- __le32 h_iste;
int ret;
shape = vgic_v5_two_level_ist_shape(ist);
@@ -1771,13 +1770,14 @@ static int vgic_v5_restore_two_level_ist(struct kvm *kvm,
void *h_iste_addr = h_l2_ist_base +
h_l2_index * ist->iste_size;
u32 intid = h_l1_index * shape.l2_entries + h_l2_index;
+ u32 h_iste;
ret = get_user(h_iste, uaddr);
if (ret)
return ret;
ret = vgic_v5_restore_ist_entry(kvm, ist, h_iste_addr,
- h_iste, intid,
+ cpu_to_le32(h_iste), intid,
intid_type);
if (ret)
return ret;
--
2.47.3
next prev parent reply other threads:[~2026-09-19 12:31 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-19 12:31 [PATCH 0/4] KVM: arm64: vgic-v5: Random sparse fixes Marc Zyngier
2026-09-19 12:31 ` [PATCH 1/4] KVM: arm64: vgic-v5: Drop __iomem attribute from {vmd,vpet}_base Marc Zyngier
2026-09-20 14:43 ` Fuad Tabba
2026-09-19 12:31 ` [PATCH 2/4] KVM: arm64: vgic-v5: Correctly reset h_lpi_ist to NULL Marc Zyngier
2026-09-20 14:42 ` Fuad Tabba
2026-09-19 12:31 ` [PATCH 3/4] KVM: arm64: vgic-v5: Tidy-up programming of vpe descriptor address Marc Zyngier
2026-09-20 14:42 ` Fuad Tabba
2026-09-19 12:31 ` Marc Zyngier [this message]
2026-09-19 12:39 ` [PATCH 4/4] KVM: arm64: vgic-v5: Correctly handle host ISTE __le32 conversion sashiko-bot
2026-09-19 15:50 ` Marc Zyngier
2026-09-20 14:42 ` Fuad Tabba
2026-09-20 14:36 ` [PATCH 0/4] KVM: arm64: vgic-v5: Random sparse fixes Fuad Tabba
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260919123150.3283606-5-maz@kernel.org \
--to=maz@kernel.org \
--cc=fuad.tabba@linux.dev \
--cc=joey.gouly@arm.com \
--cc=kvmarm@lists.linux.dev \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=oupton@kernel.org \
--cc=sascha.bischoff@arm.com \
--cc=seiden@linux.ibm.com \
--cc=suzuki.poulose@arm.com \
--cc=yuzenghui@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox