From: Eric Auger <eric.auger@redhat.com>
To: eric.auger.pro@gmail.com, eric.auger@redhat.com,
qemu-devel@nongnu.org, qemu-arm@nongnu.org,
kvmarm@lists.linux.dev, peter.maydell@linaro.org,
shaju.abraham@nutanix.com, khushit.shah@nutanix.com,
yangjinqian1@huawei.com, cohuck@redhat.com,
richard.henderson@linaro.org, sebott@redhat.com,
skolothumtho@nvidia.com, philmd@oss.qualcomm.com
Cc: maz@kernel.org, oliver.upton@linux.dev, pbonzini@redhat.com,
armbru@redhat.com, berrange@redhat.com, abologna@redhat.com,
jdenemar@redhat.com
Subject: [PATCH v10 21/26] target/arm/cpu64: Add helper to test SYSREG props against a scratch vcpu
Date: Sat, 10 Oct 2026 15:36:25 +0200 [thread overview]
Message-ID: <20261010133725.642498-22-eric.auger@redhat.com> (raw)
In-Reply-To: <20261010133725.642498-1-eric.auger@redhat.com>
Add kvm_idreg_write_scratch_vcpu helper that will be used
by qmp_query_cpu_model_expansion code to test SYSREG settings
against a scratch vcpu. Indeed when the expansion code is called
the actual vcpu has not been initialized so we use a scratch vcpu.
This latter has been initialized with features taken from
legacy compositive options (EL2, SVE, ...). So the trial is
very close to the final setup.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
target/arm/kvm_arm.h | 4 ++++
target/arm/kvm-stub.c | 7 +++++++
target/arm/kvm.c | 21 +++++++++++++++++++++
target/arm/trace-events | 1 +
4 files changed, 33 insertions(+)
diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h
index e7c40fb003..25a1dec095 100644
--- a/target/arm/kvm_arm.h
+++ b/target/arm/kvm_arm.h
@@ -14,6 +14,7 @@
#include "qapi/qapi-types-misc-arm.h"
#include "system/kvm.h"
#include "target/arm/cpu-qom.h"
+#include "cpu-idregs.h"
#define KVM_ARM_VGIC_V2 (1 << 0)
#define KVM_ARM_VGIC_V3 (1 << 1)
@@ -240,4 +241,7 @@ void arm_gic_cap_kvm_probe(GICCapability *v2, GICCapability *v3);
*/
char *kvm_print_register_name(uint64_t regidx);
+bool kvm_idreg_write_scratch_vcpu(ARMCPU *cpu, int cpufd,
+ ARM64SysRegField *field, uint64_t newfv,
+ Error **errp);
#endif
diff --git a/target/arm/kvm-stub.c b/target/arm/kvm-stub.c
index 88cbe8d85c..8e6fae0a4d 100644
--- a/target/arm/kvm-stub.c
+++ b/target/arm/kvm-stub.c
@@ -119,3 +119,10 @@ char *kvm_print_register_name(uint64_t regidx)
{
g_assert_not_reached();
}
+
+bool kvm_idreg_write_scratch_vcpu(ARMCPU *cpu, int cpufd,
+ ARM64SysRegField *field, uint64_t newfv,
+ Error **errp)
+{
+ g_assert_not_reached();
+}
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index 0c7e80aea8..82ffcac7e3 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -1297,6 +1297,27 @@ static int kvm_arm_apply_one_sysreg_prop(ARMCPU *cpu, ARM64SysRegField *field,
return kvm_arm_override_idreg_field(CPU(cpu)->kvm_fd, field, newfv, errp);
}
+bool kvm_idreg_write_scratch_vcpu(ARMCPU *cpu, int cpufd,
+ ARM64SysRegField *field, uint64_t newfv,
+ Error **errp)
+{
+ int ret;
+
+ if (!arm_cpu_validate_sysreg_prop(cpu, field, newfv, errp)) {
+ return false;
+ }
+
+ ret = kvm_arm_override_idreg_field(cpufd, field, newfv, errp);
+ if (ret) {
+ return false;
+ }
+
+ cpu->isar.idregs[field->index] =
+ deposit64(cpu->isar.idregs[field->index],
+ field->shift, field->length, newfv);
+ return true;
+}
+
static int kvm_arm_apply_sysreg_props(ARMCPU *cpu, Error **errp)
{
return arm_cpu_apply_sysreg_props(cpu, kvm_arm_apply_one_sysreg_prop, errp);
diff --git a/target/arm/trace-events b/target/arm/trace-events
index 81564f1d96..a731b5d4ba 100644
--- a/target/arm/trace-events
+++ b/target/arm/trace-events
@@ -15,6 +15,7 @@ arm_gt_update_irq(int timer, int irqstate) "gt_update_irq: timer %d irqstate %d"
kvm_arm_fixup_msi_route(uint64_t iova, uint64_t gpa) "MSI iova = 0x%"PRIx64" is translated into 0x%"PRIx64
get_host_cpu_idregs(const char *name, uint64_t value) "scratch vcpu host value for %s is 0x%"PRIx64
kvm_arm_override_idreg_field(const char *reg_name, const char *field_name, uint64_t currentfv, uint64_t newfv) "%s.%s current=0x%"PRIx64" new=0x%"PRIx64
+kvm_arm_idreg_write_scratch_vcpu(const char *name, uint64_t oldfv, uint64_t newfv, uint64_t actualfv) "successful dry-run for %s old=0x%"PRIx64" new=0x%"PRIx64" actual=0x%"PRIx64
# cpu.c
arm_cpu_reset(uint64_t mp_aff) "cpu %" PRIu64
--
2.53.0
next prev parent reply other threads:[~2026-10-10 13:39 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-10 13:36 [PATCH v10 00/26] kvm/arm: Introduce a customizable aarch64 KVM host model Eric Auger
2026-10-10 13:36 ` [PATCH v10 01/26] target/arm: Move REVIDR into isar.idregs[] storage Eric Auger
2026-10-22 10:28 ` Peter Maydell
2026-10-10 13:36 ` [PATCH v10 02/26] target/arm: Move MIDR " Eric Auger
2026-10-22 10:28 ` Peter Maydell
2026-10-10 13:36 ` [PATCH v10 03/26] target/arm: Enforce MPIDR " Eric Auger
2026-10-22 10:28 ` Peter Maydell
2026-10-10 13:36 ` [PATCH v10 04/26] target/arm/cpu-sysregs.h.inc: Update with automatic generation Eric Auger
2026-10-10 13:36 ` [PATCH v10 05/26] arm/cpu: Add infra to handle generated ID register definitions Eric Auger
2026-10-10 13:36 ` [PATCH v10 06/26] target/arm/cpu-idregs.h.inc: Generate with script Eric Auger
2026-10-10 13:36 ` [PATCH v10 07/26] target/arm/cpu-idregs.h.inc: Generate enum values Eric Auger
2026-10-10 13:36 ` [PATCH v10 08/26] target/arm/cpu-idregs.h.inc: Generate reserved fields Eric Auger
2026-10-10 13:36 ` [PATCH v10 09/26] target/arm/cpu_idregs: Generate tables for Arm64 ID registers and fields Eric Auger
2026-10-10 13:36 ` [PATCH v10 10/26] target/arm/kvm: Retrieve writable ID reg map Eric Auger
2026-10-10 13:36 ` [PATCH v10 11/26] hw/arm/virt: Make sure virt_get_caches() keeps on reading CLIDR_EL1 as 0 Eric Auger
2026-10-10 13:36 ` [PATCH v10 12/26] arm/kvm: Initialize isar.idregs[] with all writable host ID regs Eric Auger
2026-10-12 8:25 ` Khushit Shah
2026-10-10 13:36 ` [PATCH v10 13/26] target/arm/cpu64: Add properties for writable IDReg fields Eric Auger
2026-10-12 6:17 ` Khushit Shah
2026-10-10 13:36 ` [PATCH v10 14/26] target/arm/kvm: Implement SYSREG property setter and getter Eric Auger
2026-10-10 13:36 ` [PATCH v10 15/26] target/arm/kvm: Let kvm_arm_init_cpreg_list propagate an error handle Eric Auger
2026-10-10 13:36 ` [PATCH v10 16/26] target/arm/kvm: Pass an Error handle to kvm_arch_init_vcpu Eric Auger
2026-10-10 13:36 ` [PATCH v10 17/26] target/arm/kvm: Introduce kvm_arm_override_idreg_field helper Eric Auger
2026-10-10 13:36 ` [PATCH v10 18/26] target/arm/cpu64: Introduce arm_cpu_apply_sysreg_props Eric Auger
2026-10-10 13:36 ` [PATCH v10 19/26] target/arm/kvm: Apply SYSREG props Eric Auger
2026-10-10 13:36 ` [PATCH v10 20/26] target/arm/kvm: Add consistency checking for " Eric Auger
2026-10-10 13:36 ` Eric Auger [this message]
2026-10-10 13:36 ` [PATCH v10 22/26] target/arm/kvm: Add an error handle to kvm_arm_create_scratch_host_vcpu Eric Auger
2026-10-10 13:36 ` [PATCH v10 23/26] target/arm/kvm: Introduce kvm_arm_vcpu_prepare_init_features helper Eric Auger
2026-10-10 13:36 ` [PATCH v10 24/26] target/arm/kvm: Introduce kvm_arm_create_init_scratch_vcpu() Eric Auger
2026-10-10 13:36 ` [PATCH v10 25/26] arm-qmp-cmds: introspection for ID register props Eric Auger
2026-10-10 13:36 ` [PATCH v10 26/26] arm/cpu-features: Document ID reg properties Eric Auger
2026-10-12 4:38 ` [PATCH v10 00/26] kvm/arm: Introduce a customizable aarch64 KVM host model Khushit Shah
2026-10-12 5:30 ` Eric Auger
2026-10-23 11:44 ` Peter Maydell
2026-10-26 13:55 ` Eric Auger
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