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From: Julien Thierry <julien.thierry@arm.com>
To: James Morse <james.morse@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu
Cc: Marc Zyngier <marc.zyngier@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>
Subject: Re: [PATCH v1 1/6] KVM: arm64: Abstract the size of the HYP vectors pre-amble
Date: Wed, 5 Jun 2019 09:58:59 +0100	[thread overview]
Message-ID: <34170392-528f-b57c-e50c-16eac02a5043@arm.com> (raw)
In-Reply-To: <20190604144551.188107-2-james.morse@arm.com>

Hi James,

On 04/06/2019 15:45, James Morse wrote:
> The EL2 vector hardening feature causes KVM to generate vectors for
> each type of CPU present in the system. The generated sequences already
> do some of the early guest-exit work (i.e. saving registers). To avoid
> duplication the generated vectors branch to the original vector just
> after the preamble. This size is hard coded.
> 
> Adding new instructions to the HYP vector causes strange side effects,
> which are difficult to debug as the affected code is patched in at
> runtime.
> 
> Add KVM_VECTOR_PREAMBLE to tell kvm_patch_vector_branch() how big
> the preamble is. The valid_vect macro can then validate this at
> build time.
> 
> Signed-off-by: James Morse <james.morse@arm.com>
> ---
>  arch/arm64/include/asm/kvm_asm.h |  6 ++++++
>  arch/arm64/kvm/hyp/hyp-entry.S   | 10 +++++++++-
>  arch/arm64/kvm/va_layout.c       |  7 +++----
>  3 files changed, 18 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h
> index ff73f5462aca..9170c43b332f 100644
> --- a/arch/arm64/include/asm/kvm_asm.h
> +++ b/arch/arm64/include/asm/kvm_asm.h
> @@ -41,6 +41,12 @@
>  	{ARM_EXCEPTION_TRAP, 		"TRAP"		},	\
>  	{ARM_EXCEPTION_HYP_GONE,	"HYP_GONE"	}
>  
> +/*
> + * Size of the HYP vectors preamble. kvm_patch_vector_branch() generates code
> + * that jumps over this.
> + */
> +#define KVM_VECTOR_PREAMBLE	4

Nit: I would use AARCH64_INSN_SIZE instead of 4 for the value if
possible. Makes it clear what the value of the vectore preamble
represent (and if we ad instruction we just multiply).

Otherwise the patch seems a good improvement.

Reviewed-by: Julien Thierry <julien.thierry@arm.com>

Thanks,

-- 
Julien Thierry
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  reply	other threads:[~2019-06-05  8:59 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-04 14:45 [PATCH v1 0/6] KVM: arm64: Account host/guest SError more precisely (Neoverse-N1 #1349291) James Morse
2019-06-04 14:45 ` [PATCH v1 1/6] KVM: arm64: Abstract the size of the HYP vectors pre-amble James Morse
2019-06-05  8:58   ` Julien Thierry [this message]
2019-06-04 14:45 ` [PATCH v1 2/6] KVM: arm64: Consume pending SError as early as possible James Morse
2019-06-05  9:00   ` Julien Thierry
2019-06-05 11:03     ` James Morse
2019-06-04 14:45 ` [PATCH v1 3/6] KVM: arm64: Defer guest entry when an asynchronous exception is pending James Morse
2019-06-04 14:45 ` [PATCH v1 4/6] arm64: Update silicon-errata.txt for Neoverse-N1 #1349291 James Morse
2019-06-04 14:45 ` [PATCH v1 5/6] KVM: arm64: nop out dsb in __guest_enter() unless we have v8.2 RAS James Morse
2019-06-04 14:45 ` [PATCH v1 6/6] KVM: arm64: Skip more of the SError vaxorcism James Morse

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