From: Sascha Bischoff <Sascha.Bischoff@arm.com>
To: "jonathan.cameron@huawei.com" <jonathan.cameron@huawei.com>
Cc: "yuzenghui@huawei.com" <yuzenghui@huawei.com>,
"lpieralisi@kernel.org" <lpieralisi@kernel.org>,
Timothy Hayes <Timothy.Hayes@arm.com>,
Suzuki Poulose <Suzuki.Poulose@arm.com>, nd <nd@arm.com>,
"peter.maydell@linaro.org" <peter.maydell@linaro.org>,
"kvmarm@lists.linux.dev" <kvmarm@lists.linux.dev>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
Joey Gouly <Joey.Gouly@arm.com>,
"maz@kernel.org" <maz@kernel.org>,
"oliver.upton@linux.dev" <oliver.upton@linux.dev>
Subject: Re: [PATCH v2 24/36] KVM: arm64: gic-v5: Create, init vgic_v5
Date: Thu, 8 Jan 2026 16:55:28 +0000 [thread overview]
Message-ID: <558cecd63bad7f180024ff944eb5fe04a2197d2b.camel@arm.com> (raw)
In-Reply-To: <20260107154913.00005193@huawei.com>
On Wed, 2026-01-07 at 15:49 +0000, Jonathan Cameron wrote:
> On Fri, 19 Dec 2025 15:52:44 +0000
> Sascha Bischoff <Sascha.Bischoff@arm.com> wrote:
>
> > Update kvm_vgic_create to create a vgic_v5 device. When creating a
> > vgic, FEAT_GCIE in the ID_AA64PFR2 is only exposed to vgic_v5-based
> > guests, and is hidden otherwise. GIC in ~ID_AA64PFR0_EL1 is never
> > exposed for a vgic_v5 guest.
> >
> > When initialising a vgic_v5, skip kvm_vgic_dist_init as GICv5
> > doesn't
> > support one. The current vgic_v5 implementation only supports PPIs,
> > so
> > no SPIs are initialised either.
> >
> > The current vgic_v5 support doesn't extend to nested
>
> Odd early wrapping of message.
Fixed. Interestingly, emacs is very insistent that this is the correct
way to wrap here.
>
> > guests. Therefore, the init of vgic_v5 for a nested guest is failed
> > in
> > vgic_v5_init.
> >
> > As the current vgic_v5 doesn't require any resources to be mapped,
> > vgic_v5_map_resources is simply used to check that the vgic has
> > indeed
> > been initialised. Again, this will change as more GICv5 support is
> > merged in.
> >
> > Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
> Comments mostly on existing code, so
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
> > ---
> > arch/arm64/kvm/vgic/vgic-init.c | 51 ++++++++++++++++++++++-------
> > ----
> > arch/arm64/kvm/vgic/vgic-v5.c | 26 +++++++++++++++++
> > arch/arm64/kvm/vgic/vgic.h | 2 ++
> > include/kvm/arm_vgic.h | 1 +
> > 4 files changed, 63 insertions(+), 17 deletions(-)
> >
> > diff --git a/arch/arm64/kvm/vgic/vgic-init.c
> > b/arch/arm64/kvm/vgic/vgic-init.c
> > index 03f45816464b0..afb5888cd8219 100644
> > --- a/arch/arm64/kvm/vgic/vgic-init.c
> > +++ b/arch/arm64/kvm/vgic/vgic-init.c
>
> > if (type == KVM_DEV_TYPE_ARM_VGIC_V3)
> > @@ -420,20 +427,26 @@ int vgic_init(struct kvm *kvm)
> > if (kvm->created_vcpus != atomic_read(&kvm->online_vcpus))
> > return -EBUSY;
> >
> > - /* freeze the number of spis */
> > - if (!dist->nr_spis)
> > - dist->nr_spis = VGIC_NR_IRQS_LEGACY -
> > VGIC_NR_PRIVATE_IRQS;
> > + if (!vgic_is_v5(kvm)) {
> > + /* freeze the number of spis */
> > + if (!dist->nr_spis)
> > + dist->nr_spis = VGIC_NR_IRQS_LEGACY -
> > VGIC_NR_PRIVATE_IRQS;
> >
> > - ret = kvm_vgic_dist_init(kvm, dist->nr_spis);
> > - if (ret)
> > - goto out;
> > + ret = kvm_vgic_dist_init(kvm, dist->nr_spis);
> > + if (ret)
> > + goto out;
>
> Not really related to this patch, but I have no idea why this
> function
> doesn't just do early returns on error in all paths (rather than just
> some of them).
> It might be worth changing that to improve readability.
Yeah, I've done that.
>
>
> >
> > - /*
> > - * Ensure vPEs are allocated if direct IRQ injection (e.g.
> > vSGIs,
> > - * vLPIs) is supported.
> > - */
> > - if (vgic_supports_direct_irqs(kvm)) {
> > - ret = vgic_v4_init(kvm);
> > + /*
> > + * Ensure vPEs are allocated if direct IRQ
> > injection (e.g. vSGIs,
> > + * vLPIs) is supported.
> > + */
> > + if (vgic_supports_direct_irqs(kvm)) {
> > + ret = vgic_v4_init(kvm);
> > + if (ret)
> > + goto out;
> > + }
> > + } else {
> > + ret = vgic_v5_init(kvm);
> > if (ret)
> > goto out;
> > }
> > @@ -610,9 +623,13 @@ int kvm_vgic_map_resources(struct kvm *kvm)
> > if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2) {
> > ret = vgic_v2_map_resources(kvm);
> > type = VGIC_V2;
> > - } else {
> > + } else if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
> > ret = vgic_v3_map_resources(kvm);
> > type = VGIC_V3;
> > + } else {
> > + ret = vgic_v5_map_resources(kvm);
> > + type = VGIC_V5;
> > + goto out;
> This skips over the checking of ret which is fine (given it's just
> goto out)
> but I'd add a comment to say why the next bit is skipped or a more
> complex
> flow (maybe a flag to say dist is relevant that gates the next bit.
I've moved to using a flag as it makes things more readable.
Sascha
>
> > }
> >
> > if (ret)
>
>
next prev parent reply other threads:[~2026-01-08 16:56 UTC|newest]
Thread overview: 101+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-19 15:52 [PATCH v2 00/36] KVM: arm64: Introduce vGIC-v5 with PPI support Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 03/36] arm64/sysreg: Drop ICH_HFGRTR_EL2.ICC_HAPR_EL1 and make RES1 Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 01/36] KVM: arm64: Account for RES1 bits in DECLARE_FEAT_MAP() and co Sascha Bischoff
2026-01-06 17:23 ` Jonathan Cameron
2026-01-08 16:52 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 02/36] KVM: arm64: gic-v3: Switch vGIC-v3 to use generated ICH_VMCR_EL2 Sascha Bischoff
2026-01-06 18:00 ` Jonathan Cameron
2026-01-07 10:55 ` Sascha Bischoff
2026-01-09 16:57 ` Sascha Bischoff
2026-01-12 12:41 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 06/36] KVM: arm64: gic-v5: Add ARM_VGIC_V5 device to KVM headers Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 04/36] arm64/sysreg: Add remaining GICv5 ICC_ & ICH_ sysregs for KVM support Sascha Bischoff
2026-01-06 18:28 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 05/36] arm64/sysreg: Add GICR CDNMIA encoding Sascha Bischoff
2026-01-06 18:08 ` Jonathan Cameron
2026-01-07 8:39 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 08/36] KVM: arm64: Introduce kvm_call_hyp_nvhe_res() Sascha Bischoff
2026-01-07 10:30 ` Jonathan Cameron
2026-01-08 9:48 ` Sascha Bischoff
2026-01-08 10:26 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 07/36] KVM: arm64: gic: Introduce interrupt type helpers Sascha Bischoff
2026-01-06 14:51 ` Joey Gouly
2026-01-06 18:43 ` Jonathan Cameron
2026-01-08 9:33 ` Sascha Bischoff
2026-01-08 10:25 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 09/36] KVM: arm64: gic-v5: Detect implemented PPIs on boot Sascha Bischoff
2026-01-06 18:34 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 11/36] KVM: arm64: gic-v5: Support GICv5 FGTs & FGUs Sascha Bischoff
2026-01-07 11:19 ` Jonathan Cameron
2026-01-08 10:36 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 12/36] KVM: arm64: gic-v5: Add emulation for ICC_IAFFIDR_EL1 accesses Sascha Bischoff
2026-01-07 11:10 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 10/36] KVM: arm64: gic-v5: Sanitize ID_AA64PFR2_EL1.GCIE Sascha Bischoff
2026-01-07 10:58 ` Jonathan Cameron
2026-01-08 9:54 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 14/36] KVM: arm64: gic-v5: Add vgic-v5 save/restore hyp interface Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 13/36] KVM: arm64: gic: Set vgic_model before initing private IRQs Sascha Bischoff
2026-01-07 11:24 ` Jonathan Cameron
2026-01-08 13:39 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 15/36] KVM: arm64: gic-v5: Implement GICv5 load/put and save/restore Sascha Bischoff
2026-01-07 12:28 ` Jonathan Cameron
2026-01-08 13:40 ` Sascha Bischoff
2026-01-08 16:52 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 17/36] KVM: arm64: gic: Introduce irq_queue and set_pending_state to irq_ops Sascha Bischoff
2026-01-07 12:22 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 16/36] KVM: arm64: gic-v5: Implement direct injection of PPIs Sascha Bischoff
2026-01-07 12:16 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 20/36] KVM: arm64: gic-v5: Init Private IRQs (PPIs) for GICv5 Sascha Bischoff
2026-01-07 15:04 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 19/36] KVM: arm64: gic-v5: Check for pending PPIs Sascha Bischoff
2026-01-07 15:00 ` Jonathan Cameron
2026-01-08 16:23 ` Sascha Bischoff
2026-01-08 16:57 ` Jonathan Cameron
2026-01-08 16:10 ` Joey Gouly
2026-01-08 16:21 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 18/36] KVM: arm64: gic-v5: Implement PPI interrupt injection Sascha Bischoff
2026-01-06 16:06 ` Joey Gouly
2026-01-06 18:04 ` Sascha Bischoff
2026-01-07 12:50 ` Jonathan Cameron
2026-01-08 14:43 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 21/36] KVM: arm64: gic-v5: Finalize GICv5 PPIs and generate mask Sascha Bischoff
2026-01-07 15:08 ` Jonathan Cameron
2026-01-08 16:51 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 23/36] KVM: arm64: gic-v5: Support GICv5 interrupts with KVM_IRQ_LINE Sascha Bischoff
2026-01-07 15:29 ` Jonathan Cameron
2026-01-08 16:53 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 22/36] KVM: arm64: gic-v5: Trap and mask guest PPI register accesses Sascha Bischoff
2026-01-07 15:17 ` Jonathan Cameron
2026-01-09 16:59 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 24/36] KVM: arm64: gic-v5: Create, init vgic_v5 Sascha Bischoff
2026-01-07 15:49 ` Jonathan Cameron
2026-01-08 16:55 ` Sascha Bischoff [this message]
2025-12-19 15:52 ` [PATCH v2 25/36] KVM: arm64: gic-v5: Reset vcpu state Sascha Bischoff
2026-01-07 15:51 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 26/36] KVM: arm64: gic-v5: Bump arch timer for GICv5 Sascha Bischoff
2026-01-07 16:08 ` Jonathan Cameron
2026-01-09 16:56 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 28/36] KVM: arm64: gic: Hide GICv5 for protected guests Sascha Bischoff
2026-01-07 16:12 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 27/36] KVM: arm64: gic-v5: Mandate architected PPI for PMU emulation on GICv5 Sascha Bischoff
2026-01-06 15:06 ` Joey Gouly
2026-01-07 9:48 ` Sascha Bischoff
2026-01-07 16:11 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 29/36] KVM: arm64: gic-v5: Hide FEAT_GCIE from NV GICv5 guests Sascha Bischoff
2026-01-07 16:13 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 31/36] KVM: arm64: gic-v5: Set ICH_VCTLR_EL2.En on boot Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 30/36] KVM: arm64: gic-v5: Introduce kvm_arm_vgic_v5_ops and register them Sascha Bischoff
2026-01-07 16:19 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 34/36] Documentation: KVM: Introduce documentation for VGICv5 Sascha Bischoff
2026-01-07 16:27 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 33/36] KVM: arm64: gic-v5: Probe for GICv5 device Sascha Bischoff
2026-01-07 16:25 ` Jonathan Cameron
2026-01-09 15:00 ` Joey Gouly
2025-12-19 15:52 ` [PATCH v2 32/36] irqchip/gic-v5: Check if impl is virt capable Sascha Bischoff
2026-01-07 16:21 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 36/36] KVM: arm64: gic-v5: Communicate userspace-drivable PPIs via a UAPI Sascha Bischoff
2026-01-07 16:51 ` Jonathan Cameron
2026-01-09 17:00 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 35/36] KVM: arm64: selftests: Introduce a minimal GICv5 PPI selftest Sascha Bischoff
2026-01-07 16:38 ` Jonathan Cameron
2025-12-19 16:17 ` [PATCH v2 00/36] KVM: arm64: Introduce vGIC-v5 with PPI support Sascha Bischoff
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