From: Marc Zyngier <marc.zyngier@arm.com>
To: Shannon Zhao <zhaoshenglong@huawei.com>,
kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org
Cc: linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org,
will.deacon@arm.com, alex.bennee@linaro.org, wei@redhat.com,
cov@codeaurora.org, shannon.zhao@linaro.org,
peter.huangpeng@huawei.com, hangaohuai@huawei.com
Subject: Re: [PATCH v5 02/21] KVM: ARM64: Define PMU data structure for each vcpu
Date: Mon, 07 Dec 2015 16:42:59 +0000 [thread overview]
Message-ID: <5665B713.3020900@arm.com> (raw)
In-Reply-To: <5665A026.8000802@arm.com>
On 07/12/15 15:05, Marc Zyngier wrote:
> On 03/12/15 06:11, Shannon Zhao wrote:
>> From: Shannon Zhao <shannon.zhao@linaro.org>
>>
>> Here we plan to support virtual PMU for guest by full software
>> emulation, so define some basic structs and functions preparing for
>> futher steps. Define struct kvm_pmc for performance monitor counter and
>> struct kvm_pmu for performance monitor unit for each vcpu. According to
>> ARMv8 spec, the PMU contains at most 32(ARMV8_MAX_COUNTERS) counters.
>>
>> Since this only supports ARM64 (or PMUv3), add a separate config symbol
>> for it.
>>
>> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
>> ---
>> arch/arm64/include/asm/kvm_host.h | 2 ++
>> arch/arm64/kvm/Kconfig | 8 ++++++++
>> include/kvm/arm_pmu.h | 41 +++++++++++++++++++++++++++++++++++++++
>> 3 files changed, 51 insertions(+)
>> create mode 100644 include/kvm/arm_pmu.h
>>
>> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
>> index a35ce72..42e15bb 100644
>> --- a/arch/arm64/include/asm/kvm_host.h
>> +++ b/arch/arm64/include/asm/kvm_host.h
>> @@ -37,6 +37,7 @@
>>
>> #include <kvm/arm_vgic.h>
>> #include <kvm/arm_arch_timer.h>
>> +#include <kvm/arm_pmu.h>
>>
>> #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
>>
>> @@ -132,6 +133,7 @@ struct kvm_vcpu_arch {
>> /* VGIC state */
>> struct vgic_cpu vgic_cpu;
>> struct arch_timer_cpu timer_cpu;
>> + struct kvm_pmu pmu;
>>
>> /*
>> * Anything that is not used directly from assembly code goes
>> diff --git a/arch/arm64/kvm/Kconfig b/arch/arm64/kvm/Kconfig
>> index a5272c0..66da9a2 100644
>> --- a/arch/arm64/kvm/Kconfig
>> +++ b/arch/arm64/kvm/Kconfig
>> @@ -36,6 +36,7 @@ config KVM
>> select HAVE_KVM_EVENTFD
>> select HAVE_KVM_IRQFD
>> select KVM_ARM_VGIC_V3
>> + select KVM_ARM_PMU
>> ---help---
>> Support hosting virtualized guest machines.
>> We don't support KVM with 16K page tables yet, due to the multiple
>> @@ -48,6 +49,13 @@ config KVM_ARM_HOST
>> ---help---
>> Provides host support for ARM processors.
>>
>> +config KVM_ARM_PMU
>> + bool
>> + depends on KVM_ARM_HOST && HW_PERF_EVENTS
>> + ---help---
>> + Adds support for a virtual Performance Monitoring Unit (PMU) in
>> + virtual machines.
>> +
>> source drivers/vhost/Kconfig
>>
>> endif # VIRTUALIZATION
>> diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h
>> new file mode 100644
>> index 0000000..0c13470
>> --- /dev/null
>> +++ b/include/kvm/arm_pmu.h
>> @@ -0,0 +1,41 @@
>> +/*
>> + * Copyright (C) 2015 Linaro Ltd.
>> + * Author: Shannon Zhao <shannon.zhao@linaro.org>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program. If not, see <http://www.gnu.org/licenses/>.
>> + */
>> +
>> +#ifndef __ASM_ARM_KVM_PMU_H
>> +#define __ASM_ARM_KVM_PMU_H
>> +
>> +#include <linux/perf_event.h>
>> +#ifdef CONFIG_KVM_ARM_PMU
>> +#include <asm/pmu.h>
>> +#endif
>> +
>> +struct kvm_pmc {
>> + u8 idx;/* index into the pmu->pmc array */
>> + struct perf_event *perf_event;
>> + struct kvm_vcpu *vcpu;
>
> Why do you need this? If you have the pointer to a kvm_pmc structure, it
> is very cheap to compute the address of the vcpu:
>
> static inline kvm_vcpu *kvm_pmc_to_vcpu(struct kvm_pmc *pmc)
> {
> struct kvm_pmu *pmu;
> pmc -= pmc->idx;
> pmu = container_of(pmc, struct kvm_pmu, pmc);
> return container_of(pmu, struct kvm_vcpu, pmu);
> }
>
> All of which the compiler will happily optimize for you.
FWIW, actually compiling code looks something like this:
static inline struct kvm_vcpu *kvm_pmc_to_vcpu(struct kvm_pmc *pmc)
{
struct kvm_pmu *pmu;
struct kvm_vcpu_arch *vcpu_arch;
pmc -= pmc->idx;
pmu = container_of(pmc, struct kvm_pmu, pmc[0]);
vcpu_arch = container_of(pmu, struct kvm_vcpu_arch, pmu);
return container_of(vcpu_arch, struct kvm_vcpu, arch);
}
which amounts to 4 sub instructions.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2015-12-07 16:42 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-03 6:11 [PATCH v5 00/21] KVM: ARM64: Add guest PMU support Shannon Zhao
2015-12-03 6:11 ` [PATCH v5 01/21] ARM64: Move PMU register related defines to asm/pmu.h Shannon Zhao
2015-12-03 6:11 ` [PATCH v5 02/21] KVM: ARM64: Define PMU data structure for each vcpu Shannon Zhao
2015-12-07 15:05 ` Marc Zyngier
2015-12-07 16:42 ` Marc Zyngier [this message]
2015-12-03 6:11 ` [PATCH v5 03/21] KVM: ARM64: Add offset defines for PMU registers Shannon Zhao
2015-12-07 14:06 ` Marc Zyngier
2015-12-07 14:31 ` Shannon Zhao
2015-12-07 14:55 ` Marc Zyngier
2015-12-08 8:09 ` Shannon Zhao
2015-12-08 9:02 ` Marc Zyngier
2015-12-03 6:11 ` [PATCH v5 04/21] KVM: ARM64: Add reset and access handlers for PMCR_EL0 register Shannon Zhao
2015-12-07 13:28 ` Marc Zyngier
2015-12-03 6:11 ` [PATCH v5 05/21] KVM: ARM64: Add reset and access handlers for PMSELR register Shannon Zhao
2015-12-03 6:11 ` [PATCH v5 06/21] KVM: ARM64: Add reset and access handlers for PMCEID0 and PMCEID1 register Shannon Zhao
2015-12-03 6:11 ` [PATCH v5 07/21] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function Shannon Zhao
2015-12-03 6:11 ` [PATCH v5 08/21] KVM: ARM64: Add reset and access handlers for PMXEVTYPER register Shannon Zhao
2015-12-07 13:38 ` Marc Zyngier
2015-12-03 6:11 ` [PATCH v5 09/21] KVM: ARM64: Add reset and access handlers for PMXEVCNTR register Shannon Zhao
2015-12-03 6:11 ` [PATCH v5 10/21] KVM: ARM64: Add reset and access handlers for PMCCNTR register Shannon Zhao
2015-12-03 6:11 ` [PATCH v5 11/21] KVM: ARM64: Add reset and access handlers for PMCNTENSET and PMCNTENCLR register Shannon Zhao
2015-12-07 13:42 ` Marc Zyngier
2015-12-03 6:11 ` [PATCH v5 12/21] KVM: ARM64: Add reset and access handlers for PMINTENSET and PMINTENCLR register Shannon Zhao
2015-12-03 6:11 ` [PATCH v5 13/21] KVM: ARM64: Add reset and access handlers for PMOVSSET and PMOVSCLR register Shannon Zhao
2015-12-03 6:11 ` [PATCH v5 14/21] KVM: ARM64: Add reset and access handlers for PMUSERENR register Shannon Zhao
2015-12-03 6:11 ` [PATCH v5 15/21] KVM: ARM64: Add reset and access handlers for PMSWINC register Shannon Zhao
2015-12-03 6:11 ` [PATCH v5 16/21] KVM: ARM64: Add access handlers for PMEVCNTRn and PMEVTYPERn register Shannon Zhao
2015-12-03 6:11 ` [PATCH v5 17/21] KVM: ARM64: Add helper to handle PMCR register bits Shannon Zhao
2015-12-03 6:11 ` [PATCH v5 18/21] KVM: ARM64: Add PMU overflow interrupt routing Shannon Zhao
2015-12-03 6:11 ` [PATCH v5 19/21] KVM: ARM64: Reset PMU state when resetting vcpu Shannon Zhao
2015-12-03 6:11 ` [PATCH v5 20/21] KVM: ARM64: Free perf event of PMU when destroying vcpu Shannon Zhao
2015-12-03 6:11 ` [PATCH v5 21/21] KVM: ARM64: Add a new kvm ARM PMU device Shannon Zhao
2015-12-07 13:56 ` Marc Zyngier
2015-12-07 14:37 ` Shannon Zhao
2015-12-07 15:06 ` Marc Zyngier
2015-12-07 14:11 ` [PATCH v5 00/21] KVM: ARM64: Add guest PMU support Marc Zyngier
2015-12-07 14:47 ` Shannon Zhao
2015-12-07 15:09 ` Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5665B713.3020900@arm.com \
--to=marc.zyngier@arm.com \
--cc=alex.bennee@linaro.org \
--cc=christoffer.dall@linaro.org \
--cc=cov@codeaurora.org \
--cc=hangaohuai@huawei.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=peter.huangpeng@huawei.com \
--cc=shannon.zhao@linaro.org \
--cc=wei@redhat.com \
--cc=will.deacon@arm.com \
--cc=zhaoshenglong@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).