From: Shannon Zhao <shannon.zhao@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: kvm-devel <kvm@vger.kernel.org>,
Marc Zyngier <marc.zyngier@arm.com>,
Will Deacon <will.deacon@arm.com>,
arm-mail-list <linux-arm-kernel@lists.infradead.org>,
"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>
Subject: Re: [PATCH v8 20/20] KVM: ARM64: Add a new kvm ARM PMU device
Date: Fri, 08 Jan 2016 21:31:23 +0800 [thread overview]
Message-ID: <568FBA2B.60503@linaro.org> (raw)
In-Reply-To: <CAFEAcA9O7WUtPzETvjAwHQeJ8h65bxTjsYtr5_McE26k-5rdUw@mail.gmail.com>
On 2016/1/8 20:56, Peter Maydell wrote:
> On 8 January 2016 at 12:15, Shannon Zhao <shannon.zhao@linaro.org> wrote:
>> Firstly, userspace will call kvm device ioctl to create the PMU device, if
>> it fails it will return an error.
>> Secondly, userspace will call SET_DEVICE_ATTR ioctl to configure the PMU irq
>> number. If the irq is invalid, this will return an error and the userspace
>> will stop if it takes care the error. If the irq is valid, the PMU is well
>> initialized.
>>
>> If userspace doesn't call SET_ATTR ioctl to configure the PMU irq, the PMU
>> is not well initialized and guest can't use the PMU.
>
> Yes, this is my point. If you require userspace to do:
> * create PMU device
> * configure PMU device via SET_DEVICE_ATTR
> * complete init of PMU device via a KVM_DEV_ARM_PMU_CTRL_INIT attr
>
> then any bugs on the userspace side where it isn't configuring
> correctly can be easily caught, and will turn into a "VM fails
> to start with helpful error message", rather than "VM starts but
> doesn't work in an obscure way".
>
> This is particularly important for devices which have userspace
> visible registers, because userspace will also want to be able
> to read and write state of those registers before first vcpu run.
> If there is no "init is complete" ioctl then the kernel code ends
> up having to guess when init has completed for various entry points
> where the guest does something else (register access, vcpu start, etc).
>
> It might happen to not be so important for the PMU, but I think it
> would be very useful if we have a pattern where every device that
> is created via this API works in the same way (and it means that if
> we end up extending the PMU in future we will already have the API
> in place and don't need to worry about legacy userspace).
>
> Speaking of userspace access to registers, what is the intended API
> for migrating the PMU register state ?
>
Since the PMU register states are stored in sys_regs[NR_SYS_REGS], they
could be migrated with other sys registers. There is only the "struct
perf_event *perf_event" we should take care of I think. I didn't figure
out a good way for this especially when guest is using the perf.
Thanks,
--
Shannon
next prev parent reply other threads:[~2016-01-08 13:27 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-22 8:07 [PATCH v8 00/20] KVM: ARM64: Add guest PMU support Shannon Zhao
2015-12-22 8:07 ` [PATCH v8 01/20] ARM64: Move PMU register related defines to asm/pmu.h Shannon Zhao
2016-01-07 10:20 ` Marc Zyngier
2015-12-22 8:07 ` [PATCH v8 02/20] KVM: ARM64: Define PMU data structure for each vcpu Shannon Zhao
2016-01-07 10:21 ` Marc Zyngier
2016-01-07 19:07 ` Andrew Jones
2015-12-22 8:07 ` [PATCH v8 03/20] KVM: ARM64: Add offset defines for PMU registers Shannon Zhao
2016-01-07 10:23 ` Marc Zyngier
2015-12-22 8:07 ` [PATCH v8 04/20] KVM: ARM64: Add access handler for PMCR register Shannon Zhao
2016-01-07 10:43 ` Marc Zyngier
2016-01-07 11:16 ` Shannon Zhao
2015-12-22 8:08 ` [PATCH v8 05/20] KVM: ARM64: Add access handler for PMSELR register Shannon Zhao
2016-01-07 10:43 ` Marc Zyngier
2015-12-22 8:08 ` [PATCH v8 06/20] KVM: ARM64: Add access handler for PMCEID0 and PMCEID1 register Shannon Zhao
2016-01-07 10:44 ` Marc Zyngier
2015-12-22 8:08 ` [PATCH v8 07/20] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function Shannon Zhao
2016-01-07 10:55 ` Marc Zyngier
2016-01-07 13:48 ` Marc Zyngier
2016-01-07 14:00 ` Shannon Zhao
2015-12-22 8:08 ` [PATCH v8 08/20] KVM: ARM64: Add access handler for event typer register Shannon Zhao
2016-01-07 11:03 ` Marc Zyngier
2016-01-07 11:11 ` Shannon Zhao
2016-01-07 12:36 ` Shannon Zhao
2016-01-07 13:15 ` Marc Zyngier
2016-01-07 12:09 ` Shannon Zhao
2016-01-07 13:01 ` Marc Zyngier
2016-01-07 19:17 ` Andrew Jones
2015-12-22 8:08 ` [PATCH v8 09/20] KVM: ARM64: Add access handler for event counter register Shannon Zhao
2016-01-07 11:06 ` Marc Zyngier
2015-12-22 8:08 ` [PATCH v8 10/20] KVM: ARM64: Add access handler for PMCNTENSET and PMCNTENCLR register Shannon Zhao
2016-01-07 11:09 ` Marc Zyngier
2015-12-22 8:08 ` [PATCH v8 11/20] KVM: ARM64: Add access handler for PMINTENSET and PMINTENCLR register Shannon Zhao
2016-01-07 11:13 ` Marc Zyngier
2015-12-22 8:08 ` [PATCH v8 12/20] KVM: ARM64: Add access handler for PMOVSSET and PMOVSCLR register Shannon Zhao
2016-01-07 11:14 ` Marc Zyngier
2015-12-22 8:08 ` [PATCH v8 13/20] KVM: ARM64: Add access handler for PMSWINC register Shannon Zhao
2016-01-07 11:29 ` Marc Zyngier
2015-12-22 8:08 ` [PATCH v8 14/20] KVM: ARM64: Add helper to handle PMCR register bits Shannon Zhao
2016-01-07 11:59 ` Marc Zyngier
2015-12-22 8:08 ` [PATCH v8 15/20] KVM: ARM64: Add a helper to forward trap to guest EL1 Shannon Zhao
2015-12-22 8:08 ` [PATCH v8 16/20] KVM: ARM64: Add access handler for PMUSERENR register Shannon Zhao
2016-01-07 10:14 ` Marc Zyngier
2016-01-07 11:15 ` Shannon Zhao
2015-12-22 8:08 ` [PATCH v8 17/20] KVM: ARM64: Add PMU overflow interrupt routing Shannon Zhao
2016-01-07 13:28 ` Marc Zyngier
2015-12-22 8:08 ` [PATCH v8 18/20] KVM: ARM64: Reset PMU state when resetting vcpu Shannon Zhao
2016-01-07 13:39 ` Marc Zyngier
2015-12-22 8:08 ` [PATCH v8 19/20] KVM: ARM64: Free perf event of PMU when destroying vcpu Shannon Zhao
2016-01-07 13:51 ` Marc Zyngier
2015-12-22 8:08 ` [PATCH v8 20/20] KVM: ARM64: Add a new kvm ARM PMU device Shannon Zhao
2016-01-07 13:56 ` Marc Zyngier
2016-01-07 14:35 ` Shannon Zhao
2016-01-07 14:36 ` Peter Maydell
2016-01-07 14:49 ` Shannon Zhao
2016-01-07 14:56 ` Peter Maydell
2016-01-07 20:36 ` Andrew Jones
2016-01-09 12:29 ` Christoffer Dall
2016-01-09 15:03 ` Marc Zyngier
2016-01-11 8:45 ` Shannon Zhao
2016-01-11 8:59 ` Marc Zyngier
2016-01-11 11:52 ` Andrew Jones
2016-01-11 12:03 ` Shannon Zhao
2016-01-11 14:07 ` Andrew Jones
2016-01-11 15:09 ` Christoffer Dall
2016-01-11 16:09 ` Andrew Jones
2016-01-11 16:13 ` Peter Maydell
2016-01-11 16:48 ` Andrew Jones
2016-01-11 16:21 ` Andrew Jones
2016-01-11 16:29 ` Peter Maydell
2016-01-11 16:44 ` Andrew Jones
2016-01-08 3:06 ` Shannon Zhao
2016-01-08 10:24 ` Peter Maydell
2016-01-08 12:15 ` Shannon Zhao
2016-01-08 12:56 ` Peter Maydell
2016-01-08 13:31 ` Shannon Zhao [this message]
2016-01-07 20:18 ` Andrew Jones
2016-01-08 2:53 ` Shannon Zhao
2016-01-08 11:22 ` Andrew Jones
2016-01-08 15:20 ` Andrew Jones
2016-01-08 15:59 ` Andrew Jones
2016-01-07 14:10 ` [PATCH v8 00/20] KVM: ARM64: Add guest PMU support Marc Zyngier
2016-01-07 14:12 ` Will Deacon
2016-01-07 14:21 ` Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=568FBA2B.60503@linaro.org \
--to=shannon.zhao@linaro.org \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=marc.zyngier@arm.com \
--cc=peter.maydell@linaro.org \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).