From: James Morse <james.morse@arm.com>
To: Dongjiu Geng <gengdongjiu@huawei.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, corbet@lwn.net,
marc.zyngier@arm.com, catalin.marinas@arm.com,
linux-doc@vger.kernel.org, rjw@rjwysocki.net,
linux@armlinux.org.uk, will.deacon@arm.com,
robert.moore@intel.com, linux-acpi@vger.kernel.org, bp@alien8.de,
lv.zheng@intel.com, huangshaoyu@huawei.com,
kvmarm@lists.cs.columbia.edu, devel@acpica.org
Subject: Re: [PATCH v9 3/7] acpi: apei: Add SEI notification type support for ARMv8
Date: Mon, 22 Jan 2018 19:39:24 +0000 [thread overview]
Message-ID: <5A663DEC.8080804@arm.com> (raw)
In-Reply-To: <1515254577-6460-4-git-send-email-gengdongjiu@huawei.com>
Hi Dongjiu Geng,
(versions of patches 1,2 and 4 have been queued by Catalin)
(Nit 'ACPI / APEI:' is the normal subject prefix for ghes.c, this helps the
maintainers know which patches they need to pay attention to when you are
touching multiple trees)
On 06/01/18 16:02, Dongjiu Geng wrote:
> ARMv8.2 requires implementation of the RAS extension.
> In
> this extension, it adds SEI(SError Interrupt) notification
> type, this patch adds new GHES error source SEI handling
> functions.
This reads as if this patch is handling SError RAS notifications generated by a
CPU with the RAS extensions. These are about CPU->Software notifications. APEI
and GHES are a firmware first mechanism which is Software->Software.
Reading the v8.2 documents won't help anyone with the APEI/GHES code.
Please describe this from the ACPI view, "ACPI 6.x adds support for NOTIFY_SEI
as a GHES notification mechanism... ", its up to the arch code to spot a v8.2
RAS Error based on the cpu caps.
> This error source parsing and handling method
> is similar with the SEA.
There are problems with doing this:
Oct. 18, 2017, 10:26 a.m. James Morse wrote:
| How do SEA and SEI interact?
|
| As far as I can see they can both interrupt each other, which isn't something
| the single in_nmi() path in APEI can handle. I thinks we should fix this
| first.
[..]
| SEA gets away with a lot of things because its synchronous. SEI isn't. Xie
| XiuQi pointed to the memory_failure_queue() code. We can use this directly
| from SEA, but not SEI. (what happens if an SError arrives while we are
| queueing memory_failure work from an IRQ).
|
| The one that scares me is the trace-point reporting stuff. What happens if an
| SError arrives while we are enabling a trace point? (these are static-keys
| right?)
|
| I don't think we can just plumb SEI in like this and be done with it.
| (I'm looking at teasing out the estatus cache code from being x86:NMI only.
| This way we solve the same 'cant do this from NMI context' with the same
| code'.)
I will post what I've got for this estatus-cache thing as an RFC, its not ready
to be considered yet.
> Expose API ghes_notify_sei() to external users. External
> modules can call this exposed API to parse APEI table and
> handle the SEI notification.
external modules? You mean called by the arch code when it gets this NOTIFY_SEI?
Thanks,
James
next prev parent reply other threads:[~2018-01-22 19:36 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-06 16:02 [PATCH v9 0/7] Handle guest RAS Error in KVM and kernel Dongjiu Geng
2018-01-06 16:02 ` [PATCH v9 1/7] arm64: cpufeature: Detect CPU RAS Extentions Dongjiu Geng
2018-01-06 16:02 ` [PATCH v9 2/7] KVM: arm64: Save ESR_EL2 on guest SError Dongjiu Geng
2018-01-06 16:02 ` [PATCH v9 3/7] acpi: apei: Add SEI notification type support for ARMv8 Dongjiu Geng
2018-01-22 19:39 ` James Morse [this message]
2018-01-23 9:23 ` gengdongjiu
2018-01-23 10:07 ` gengdongjiu
2018-01-30 19:39 ` James Morse
2018-01-06 16:02 ` [PATCH v9 4/7] KVM: arm64: Trap RAS error registers and set HCR_EL2's TERR & TEA Dongjiu Geng
2018-01-06 16:02 ` [PATCH v9 5/7] arm64: kvm: Introduce KVM_ARM_SET_SERROR_ESR ioctl Dongjiu Geng
2018-01-23 19:06 ` James Morse
2018-01-06 16:02 ` [PATCH v9 6/7] arm64: kvm: Set Virtual SError Exception Syndrome for guest Dongjiu Geng
2018-01-23 19:07 ` James Morse
2018-01-25 8:21 ` gengdongjiu
2018-01-06 16:02 ` [PATCH v9 7/7] arm64: kvm: handle guest SError Interrupt by categorization Dongjiu Geng
-- strict thread matches above, loose matches on Subject: below --
2018-02-05 11:24 [PATCH v9 3/7] acpi: apei: Add SEI notification type support for ARMv8 gengdongjiu
2018-02-15 17:55 ` James Morse
2018-04-12 5:00 ` gengdongjiu
2018-04-12 16:14 ` James Morse
2018-04-13 13:50 ` gengdongjiu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5A663DEC.8080804@arm.com \
--to=james.morse@arm.com \
--cc=bp@alien8.de \
--cc=catalin.marinas@arm.com \
--cc=corbet@lwn.net \
--cc=devel@acpica.org \
--cc=gengdongjiu@huawei.com \
--cc=huangshaoyu@huawei.com \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=lv.zheng@intel.com \
--cc=marc.zyngier@arm.com \
--cc=rjw@rjwysocki.net \
--cc=robert.moore@intel.com \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox