From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 153DA54BFC for ; Mon, 8 Jan 2024 17:46:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="D8yiJHlO" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 87A58C433C8; Mon, 8 Jan 2024 17:46:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1704735975; bh=sggkAbQsD67a6iRYIRHWcupeo05mEp2wThMNl7TOb2k=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=D8yiJHlOhBfH8LbxCpQyPb1M/rNyK+MuADzSmu036kjg5983WRKV09qPuqqI4/qQr 8hlhGpBtSdFAZYzqA9qgUQ8IAvz9f2Bb9y+1T9LV+iWBsIwWiJx0sliQFdhYUQ8fYr GwxtjCDdRqBlzRZekONfuGcLF0GnZNakcbmTezI+gHW41CR2J5OAr+lZRrDOTKr7++ mQ68Z1Td1pitJfjr40Ilfy/rt4kkpMuTIvH3jTA7UebhfnksmdvWCEQJ8U+XWzJQOA OR5iTRn1bW3KOp79bgSqAxEm5VIlLgLVxyRZZWyMR+l3FUcs5kc7/5r26phRkLgMf6 DBOZvZyvJFYDA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1rMthV-009the-1M; Mon, 08 Jan 2024 17:46:13 +0000 Date: Mon, 08 Jan 2024 17:46:12 +0000 Message-ID: <86a5pfafbv.wl-maz@kernel.org> From: Marc Zyngier To: Will Deacon Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, Catalin Marinas , Mark Rutland , Ard Biesheuvel , James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu Subject: Re: [PATCH v3 02/13] arm64: cpufeatures: Correctly handle signed values In-Reply-To: <20231211122416.GA25277@willie-the-truck> References: <20231127114559.990314-1-maz@kernel.org> <20231127114559.990314-3-maz@kernel.org> <20231211122416.GA25277@willie-the-truck> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: will@kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, catalin.marinas@arm.com, mark.rutland@arm.com, ardb@kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Mon, 11 Dec 2023 12:24:16 +0000, Will Deacon wrote: > > On Mon, Nov 27, 2023 at 11:45:48AM +0000, Marc Zyngier wrote: > > Although we've had signed values for some features such as PMUv3 > > and FP, the code that handles the comparaison with some limit > > has a couple of annoying issues: > > > > - the min_field_value is always unsigned, meaning that we cannot > > easily compare it with a negative value > > > > - it is not possible to have a range of values, let alone a range > > of negative values > > > > Fix this by: > > > > - adding an upper limit to the comparison, defaulting to all bits > > being set to the maximum positive value > > > > - ensuring that the signess of the min and max values are taken into > > account > > > > A ARM64_CPUID_FIELDS_NEG() macro is provided for signed features, but > > nothing is using it yet. > > > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/include/asm/cpufeature.h | 1 + > > arch/arm64/kernel/cpufeature.c | 65 +++++++++++++++++++++++++---- > > 2 files changed, 57 insertions(+), 9 deletions(-) > > > > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > > index f6d416fe49b0..5f3f62efebd5 100644 > > --- a/arch/arm64/include/asm/cpufeature.h > > +++ b/arch/arm64/include/asm/cpufeature.h > > @@ -363,6 +363,7 @@ struct arm64_cpu_capabilities { > > u8 field_pos; > > u8 field_width; > > u8 min_field_value; > > + u8 max_field_value; > > u8 hwcap_type; > > bool sign; > > unsigned long hwcap; > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > > index 646591c67e7a..bc8787f28ffd 100644 > > --- a/arch/arm64/kernel/cpufeature.c > > +++ b/arch/arm64/kernel/cpufeature.c > > @@ -140,12 +140,42 @@ void dump_cpu_features(void) > > pr_emerg("0x%*pb\n", ARM64_NCAPS, &system_cpucaps); > > } > > > > +#define __ARM64_MAX_POSITIVE(reg, field) \ > > + ((reg##_##field##_SIGNED ? \ > > + BIT(reg##_##field##_WIDTH - 1) : \ > > + BIT(reg##_##field##_WIDTH)) - 1) > > + > > +#define __ARM64_MIN_NEGATIVE(reg, field) BIT(reg##_##field##_WIDTH - 1) > > I'm struggling to grok these two macros. For example, let's say I have a > 4-bit signed field. In that case, the maximum positive value is 7 (0b0111) > and the minimum negative value is -8 (0b1000), but the macros above appear > to give 0b1000 for both. Crap. Well spotted. The signed maximum needs to be further adjusted like this: #define __ARM64_MAX_POSITIVE(reg, field) \ ((reg##_##field##_SIGNED ? \ BIT(reg##_##field##_WIDTH - 1) - 1: \ BIT(reg##_##field##_WIDTH)) - 1) Thanks, M. -- Without deviation from the norm, progress is not possible.