From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 73ECA56470 for ; Wed, 22 Nov 2023 09:46:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="AqWdvnoT" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3F4B4C433D9; Wed, 22 Nov 2023 09:46:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1700646393; bh=MCMS5v3jzmf+7lLA9wZaAGLJaz2gnrfEQNsqbXtQ994=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=AqWdvnoT8BIgq72frVFNmSUx/EW9dfbieQNsKYmdNtFO+U6sj62DDF4YIafvbDiAF wVaLTXVUQApQ4uQPHDpWwDXNr3IFP9G/r+gm+RB5qakC1OWK8yK+g95ab6St8GaPE6 q1s+kFLGNK8LNYEO9HmKP6gMm1sUAP0uX/pFUjj4i5C1UsrUDdYa7dGNbHpCioK8tY 4XPDutRiM9Pc+8RZ9VMNmbAImvkc1DFlvwStS4MKRkRWpEXFva0jJdb3ECTt/AI/P8 l761J/TlUwCfdk74ux4Hg2bEBOU4obmgMi0BqRmcrHnGueAfLF1YPTNnJmBVOUT1es Yi1o/GsTAnxyw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1r5joU-00FN8b-AW; Wed, 22 Nov 2023 09:46:30 +0000 Date: Wed, 22 Nov 2023 09:46:28 +0000 Message-ID: <86leaqyvbf.wl-maz@kernel.org> From: Marc Zyngier To: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, Catalin Marinas , Will Deacon , Mark Rutland , Ard Biesheuvel , James Morse , Oliver Upton , Zenghui Yu Subject: Re: [PATCH v2 02/13] arm64: cpufeatures: Correctly handle signed values In-Reply-To: <2fb7398f-b865-44a7-8ee0-4a32ae40afa8@arm.com> References: <20231120123721.851738-1-maz@kernel.org> <20231120123721.851738-3-maz@kernel.org> <2fb7398f-b865-44a7-8ee0-4a32ae40afa8@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: suzuki.poulose@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, catalin.marinas@arm.com, will@kernel.org, mark.rutland@arm.com, ardb@kernel.org, james.morse@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 22 Nov 2023 09:29:50 +0000, Suzuki K Poulose wrote: > > On 20/11/2023 12:37, Marc Zyngier wrote: > > Although we've had signed values for some features such as PMUv3 > > and FP, the code that handles the comparaison with some limit > > has a couple of annoying issues: > > > > - the min_field_value is always unsigned, meaning that we cannot > > easily compare it with a negative value > > > > - it is not possible to have a range of values, let alone a range > > of negative values > > > > Fix this by: > > > > - adding an upper limit to the comparison, defaulting to all bits > > being set to the maximum positive value > > > > - ensuring that the signess of the min and max values are taken into > > account > > > > A ARM64_CPUID_FIELDS_NEG() macro is provided for signed features, but > > nothing is using it yet. > > > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/include/asm/cpufeature.h | 1 + > > arch/arm64/kernel/cpufeature.c | 66 +++++++++++++++++++++++++---- > > 2 files changed, 58 insertions(+), 9 deletions(-) > > > > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > > index f6d416fe49b0..5f3f62efebd5 100644 > > --- a/arch/arm64/include/asm/cpufeature.h > > +++ b/arch/arm64/include/asm/cpufeature.h > > @@ -363,6 +363,7 @@ struct arm64_cpu_capabilities { > > u8 field_pos; > > u8 field_width; > > u8 min_field_value; > > + u8 max_field_value; > > u8 hwcap_type; > > bool sign; > > unsigned long hwcap; > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > > index 646591c67e7a..e52d2c2b757f 100644 > > --- a/arch/arm64/kernel/cpufeature.c > > +++ b/arch/arm64/kernel/cpufeature.c > > @@ -140,12 +140,43 @@ void dump_cpu_features(void) > > pr_emerg("0x%*pb\n", ARM64_NCAPS, &system_cpucaps); > > } > > +#define __ARM64_EXPAND_RFV(reg, field, val) > > reg##_##field##_##val > > We have defined SYS_FIELD_VALUE to be the exact same thing in Patch 1 > and we later remove this and switch to using the same in Patch 8. > Could we not do this straight away here ? i.e. use the SYS_FIELD_VALUE > instead of adding this ? Because I'm a moron and updated everything *except* my own patches. Apologies for the noise, I'll fix that shortly. > Rest looks good to me. Thanks! M. -- Without deviation from the norm, progress is not possible.