From: Marc Zyngier <maz@kernel.org>
To: Oliver Upton <oliver.upton@linux.dev>
Cc: kvmarm@lists.linux.dev, James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Reiji Watanabe <reijiw@google.com>,
rananta@google.com
Subject: Re: [PATCH] KVM: arm64: Correctly handle RES0 bits PMEVTYPER<n>_EL0.evtCount
Date: Fri, 14 Jul 2023 09:01:31 +0100 [thread overview]
Message-ID: <86o7kevs4k.wl-maz@kernel.org> (raw)
In-Reply-To: <20230713221649.3889210-1-oliver.upton@linux.dev>
AOn Thu, 13 Jul 2023 23:16:49 +0100,
Oliver Upton <oliver.upton@linux.dev> wrote:
>
> The PMU event ID varies from 10 to 16 bits, depending on the PMU
> version. If the PMU only supports 10 bits of event ID, bits [15:10] of
> the evtCount field behave as RES0.
>
> While the actual PMU emulation code gets this right (i.e. RES0 bits are
> masked out when programming the perf event), the sysreg emulation writes
> an unmasked value to the in-memory cpu context. The net effect is that
> guest reads and writes of PMEVTYPER<n>_EL0 will see non-RES0 behavior in
> the reserved bits of the field.
>
> As it so happens, kvm_pmu_set_counter_event_type() already writes a
> masked value to the in-memory context that gets overwritten by
> access_pmu_evtyper(). Fix the issue by removing the unnecessary (and
> incorrect) register write in access_pmu_evtyper().
>
> Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Reviewed-by: Marc Zyngier <maz@kernel.org>
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2023-07-14 8:01 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-13 22:16 [PATCH] KVM: arm64: Correctly handle RES0 bits PMEVTYPER<n>_EL0.evtCount Oliver Upton
2023-07-14 8:01 ` Marc Zyngier [this message]
2023-07-14 13:46 ` Reiji Watanabe
2023-07-14 23:32 ` Oliver Upton
2023-07-14 23:29 ` Oliver Upton
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