From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 852EE45629E; Fri, 11 Sep 2026 08:22:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789114975; cv=none; b=MGNUVLO0QHDL0jIyRhnDOWbt2uMVlyckaDXPgTiXec9kgJcWp0tI2KmxMOb5OySipST4ufzw08PxuHvasthWBP9WjBPgTEOL87YUJoxVH+3UIslwsAth7er6VLGnY4On4teLwIghtYcbTX19ZNLsiJvITeovydaKGf0BJ0ecr0U= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789114975; c=relaxed/simple; bh=xxIKPGhoadvlNpHg9VvO+dip6HVru9ZuPlCAg318qiw=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=b5Ps6XeVNY6Sk4GgyQxKNFaE3k/S/9MCGcjI1IzL0Q7/l1n9AheR0FEQeg98+Rhd9zQqGBgAYbimbxW9W+6fqXrVVt+myfItG8WkrYRT43zzHlxxYumseWf7E+HLTqookfZdWF6FtaQcQ1EHpD6j5IAshe+NGXMqudkVt4vgGL4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=eLtGW9k1; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="eLtGW9k1" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 397061F000FF; Fri, 11 Sep 2026 08:22:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1789114968; bh=vq4SfWftBjb+1ax8UUsY+ELpur/pYPZ9uJzVZqYepYw=; h=Date:From:To:Cc:Subject:In-Reply-To:References; b=eLtGW9k10hWeJj1jdS5ySUy72qqmLRIkOKzyvzlCH6fBomQF59drW7v8jiG4b4Q+7 J6eoAkyBZKyNJLaJjhrRcb3bB/uGIiKJ1fJL8g4Uxt4AQGEvs0+CREvO74x8oNHw/q o45JgCVBr9rFLgMbXMr5+v1PXPdnJBUJHjr7BptUI/EfOTG0A1NSDXpwg4c+cJG+Fg aS2q3Xqd8sqTidYoK9Pmxc1sUsNv4osQZaobGJ754zQOERzex7UFElJkJ0t0QH7wpQ qV8m/SgUfo4XDZ4dxbMAkDmGKFll0UTg/iI8lrIaEa46Gqoj8LHzurEo+yMZwHVA6E lo1vQhBj9U1zg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1x4wX0-00000007eK4-0ac6; Fri, 11 Sep 2026 08:22:46 +0000 Date: Fri, 11 Sep 2026 09:22:45 +0100 Message-ID: <86qzj06vu2.wl-maz@kernel.org> From: Marc Zyngier To: Wei-Lin Chang Cc: sashiko-reviews@lists.linux.dev, kvmarm@lists.linux.dev, Oliver Upton Subject: Re: [PATCH v1 1/3] KVM: arm64: nv: Don't advertise FEAT_LPA2 for guest stage-1 In-Reply-To: References: <20260909222015.3046432-1-weilin.chang@arm.com> <20260909222015.3046432-2-weilin.chang@arm.com> <20260909224458.E7F0D1F00898@smtp.kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: weilin.chang@arm.com, sashiko-reviews@lists.linux.dev, kvmarm@lists.linux.dev, oupton@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 10 Sep 2026 11:56:05 +0100, Wei-Lin Chang wrote: > > On Wed, Sep 09, 2026 at 10:44:58PM +0000, sashiko-bot@kernel.org wrote: > > Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: > > - [Medium] Equality checks for TGRAN4 and TGRAN16 fail to mask future architectural enum values, leaking unsupported hardware capabilities to NV guests. > > -- > > > > commit 6c2ebbb5542b3e22eaee90b7cf8d8cbbc9704e7c > > Author: Wei-Lin Chang > > > > KVM: arm64: nv: Don't advertise FEAT_LPA2 for guest stage-1 > > > > There is no FEAT_LPA2 support for NV guests as of now, but we missed > > limiting it for the non-stage-2 granule size fields (TGRAN4, TGRAN16) in > > ID_AA64MMFR0_EL1. Add the sanitisation. > > > > > diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c > > > index 17123f0b6daba..4d1884b32fc48 100644 > > > --- a/arch/arm64/kvm/nested.c > > > +++ b/arch/arm64/kvm/nested.c > > > @@ -1731,6 +1731,19 @@ u64 limit_nv_id_reg(struct kvm *kvm, u32 reg, u64 val) > > > /* Hide CNTPOFF if present */ > > > val = ID_REG_LIMIT_FIELD_ENUM(val, ID_AA64MMFR0_EL1, ECV, IMP); > > > > > > + /* NV does not support FEAT_LPA2. */ > > > + if (SYS_FIELD_GET(ID_AA64MMFR0_EL1, TGRAN4, val) == > > > + ID_AA64MMFR0_EL1_TGRAN4_52_BIT) { > > > > [Severity: Medium] > > Will this exact equality check fail to mask future architectural enum values? > > > > If future hardware implements a capability enum value greater than 52_BIT for > > TGRAN4, this check will evaluate to false, leaking the unsupported capability > > to NV guests. > > > > Could this be capped instead, perhaps using inequalities or the > > ID_REG_LIMIT_FIELD_ENUM macro, to maintain forward compatibility? > > ID_REG_LIMIT_FIELD_ENUM works only for unsigned fields, perhaps it is > worth extending it so it can deal with signed enums too. Don't bother. We're not doing "crystal ball architecture". M. -- Without deviation from the norm, progress is not possible.