From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 146342D78F for ; Tue, 17 Oct 2023 18:50:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GPYmTepd" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 85FE4C433C8; Tue, 17 Oct 2023 18:50:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1697568619; bh=4d2D+ZnVKtpuZ/2tPPWPE9l9iEE0YyKEl96I7VAyGX4=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=GPYmTepdz2adg+cGxh91o1YY6majIr2jY0WGrzKZSf7N1++GNJk3azHZwLhU6Crnv GI9a7CyvhNMNCTDp+lj8/yXkhHIspo4KPbgAHlCbZPFDZYYho8XUorNG77UiB+6sRd KdGmyH58Lq6o8WSuZWOshreWInIajLs4W1kOBV2xcALOnzkLQ/aSjKNyJX+U4C7btC plHjp23tFsQHhXoi768jGDiItpYt6VJxTzGY1co/pm0uoxj/tynKihfeuoQphf0xil o/Qu4EjGO8bRwxDto9RrJzNweQa0MGDpdQv6NF4eacxBfdo+Ye0qjDBZ3JE0tZviYp WHVwuGpLm/ouw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qsp8z-0056Bq-0S; Tue, 17 Oct 2023 19:50:17 +0100 Date: Tue, 17 Oct 2023 19:50:15 +0100 Message-ID: <86sf69m6c8.wl-maz@kernel.org> From: Marc Zyngier To: Oliver Upton Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: Re: [PATCH] KVM: arm64: Do not let a L1 hypervisor access the *32_EL2 sysregs In-Reply-To: References: <20231013223311.3950585-1-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: oliver.upton@linux.dev, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Sat, 14 Oct 2023 04:32:46 +0100, Oliver Upton wrote: > > On Fri, Oct 13, 2023 at 11:33:11PM +0100, Marc Zyngier wrote: > > DBGVCR32_EL2, DACR32_EL2, IFSR32_EL2 and FPEXC32_EL2 are required to > > UNDEF when AArch32 isn't implemented, which is definitely the case when > > running NV. > > > > Given that this is the only case where these registers can trap, > > unconditionally inject an UNDEF exception. > > > > Signed-off-by: Marc Zyngier > > If you intend to send this as a fix for 6.6: > > Reviewed-by: Oliver Upton > > Otherwise it is on the stack of patches I'll pick up for 6.7 Thanks. I've queued it as a fix for now, together with Miguel's NV fix series. M. -- Without deviation from the norm, progress is not possible.