Linux KVM/arm64 development list
 help / color / mirror / Atom feed
From: Marc Zyngier <maz@kernel.org>
To: Oliver Upton <oupton@kernel.org>
Cc: kvmarm@lists.linux.dev, Joey Gouly <joey.gouly@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>
Subject: Re: [PATCH 11/12] KVM: arm64: nv: Implement HW access flag management in stage-2 SW PTW
Date: Mon, 17 Nov 2025 14:51:35 +0000	[thread overview]
Message-ID: <86wm3osoeg.wl-maz@kernel.org> (raw)
In-Reply-To: <20251112183406.2118981-12-oupton@kernel.org>

On Wed, 12 Nov 2025 18:34:05 +0000,
Oliver Upton <oupton@kernel.org> wrote:
> 
> Give the stage-2 walk similar treatment to stage-1: update the access
> flag during the table walk and do so for any walk context.
> 
> Signed-off-by: Oliver Upton <oupton@kernel.org>
> ---
>  arch/arm64/kvm/mmu.c    |  3 +++
>  arch/arm64/kvm/nested.c | 46 ++++++++++++++++++++++++++++++++++-------
>  2 files changed, 41 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
> index 96f1786c72fe..b23d3dc8865e 100644
> --- a/arch/arm64/kvm/mmu.c
> +++ b/arch/arm64/kvm/mmu.c
> @@ -2012,6 +2012,9 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu)
>  		u32 esr;
>  
>  		ret = kvm_walk_nested_s2(vcpu, fault_ipa, &nested_trans);
> +		if (ret == -EAGAIN)
> +			return 1;
> +
>  		if (ret) {
>  			esr = kvm_s2_trans_esr(&nested_trans);
>  			kvm_inject_s2_fault(vcpu, esr);
> diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
> index b2fb3d7c9c19..7293769dacf5 100644
> --- a/arch/arm64/kvm/nested.c
> +++ b/arch/arm64/kvm/nested.c
> @@ -124,13 +124,14 @@ int kvm_vcpu_init_nested(struct kvm_vcpu *vcpu)
>  }
>  
>  struct s2_walk_info {
> -	void	     *data;
> -	u64	     baddr;
> -	unsigned int max_oa_bits;
> -	unsigned int pgshift;
> -	unsigned int sl;
> -	unsigned int t0sz;
> -	bool	     be;
> +	void		*data;
> +	u64		baddr;
> +	unsigned int	max_oa_bits;
> +	unsigned int	pgshift;
> +	unsigned int	sl;
> +	unsigned int	t0sz;
> +	bool		be;
> +	bool		ha;
>  };
>  
>  static u32 compute_fsc(int level, u32 fsc)
> @@ -220,6 +221,22 @@ static int read_guest_s2_desc(phys_addr_t pa, u64 *desc, struct s2_walk_info *wi
>  	return 0;
>  }
>  
> +static int swap_guest_s2_desc(phys_addr_t pa, u64 old, u64 new,
> +			      struct s2_walk_info *wi)
> +{
> +	struct kvm_vcpu *vcpu = wi->data;
> +
> +	if (wi->be) {
> +		old = cpu_to_be64(old);
> +		new = cpu_to_be64(new);
> +	} else {
> +		old = cpu_to_be64(old);
> +		new = cpu_to_be64(new);
> +	}
> +
> +	return __kvm_at_swap_desc(vcpu->kvm, pa, old, new);
> +}
> +
>  /*
>   * This is essentially a C-version of the pseudo code from the ARM ARM
>   * AArch64.TranslationTableWalk  function.  I strongly recommend looking at
> @@ -233,7 +250,7 @@ static int walk_nested_s2_pgd(phys_addr_t ipa,
>  	int first_block_level, level, stride, input_size, base_lower_bound;
>  	phys_addr_t base_addr;
>  	unsigned int addr_top, addr_bottom;
> -	u64 desc;  /* page table entry */
> +	u64 desc, new_desc;  /* page table entry */
>  	int ret;
>  	phys_addr_t paddr;
>  
> @@ -326,6 +343,17 @@ static int walk_nested_s2_pgd(phys_addr_t ipa,
>  		return 1;
>  	}
>  
> +	if (wi->ha)
> +		new_desc |= KVM_PTE_LEAF_ATTR_LO_S2_AF;

Same issue here (new_desc not initialised).

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2025-11-17 14:51 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-12 18:33 [PATCH 00/12] KVM: arm64: nv: Implement FEAT_XNX and FEAT_HAF Oliver Upton
2025-11-12 18:33 ` [PATCH 01/12] arm64: Detect FEAT_XNX Oliver Upton
2025-11-12 18:33 ` [PATCH 02/12] KVM: arm64: Add support for FEAT_XNX stage-2 permissions Oliver Upton
2025-11-12 18:33 ` [PATCH 03/12] KVM: arm64: nv: Forward FEAT_XNX permissions to the shadow stage-2 Oliver Upton
2025-11-12 18:33 ` [PATCH 04/12] KVM: arm64: Teach ptdump about FEAT_XNX permissions Oliver Upton
2025-11-12 18:33 ` [PATCH 05/12] KVM: arm64: nv: Advertise support for FEAT_XNX Oliver Upton
2025-11-12 18:34 ` [PATCH 06/12] KVM: arm64: Call helper for reading descriptors directly Oliver Upton
2025-11-12 18:34 ` [PATCH 07/12] KVM: arm64: Handle endianness in read helper for emulated PTW Oliver Upton
2025-11-12 18:34 ` [PATCH 08/12] KVM: arm64: nv: Use pgtable definitions in stage-2 walk Oliver Upton
2025-11-12 18:34 ` [PATCH 09/12] KVM: arm64: Add helper for swapping guest descriptor Oliver Upton
2025-11-17 14:14   ` Marc Zyngier
2025-11-17 18:13     ` Oliver Upton
2025-11-12 18:34 ` [PATCH 10/12] KVM: arm64: Implement HW access flag management in stage-1 SW PTW Oliver Upton
2025-11-17 14:49   ` Marc Zyngier
2025-11-17 17:53     ` Oliver Upton
2025-11-12 18:34 ` [PATCH 11/12] KVM: arm64: nv: Implement HW access flag management in stage-2 " Oliver Upton
2025-11-17 14:51   ` Marc Zyngier [this message]
2025-11-12 18:34 ` [PATCH 12/12] KVM: arm64: nv: Expose hardware access flag management to NV guests Oliver Upton
2025-11-17 15:21 ` [PATCH 00/12] KVM: arm64: nv: Implement FEAT_XNX and FEAT_HAF Marc Zyngier

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=86wm3osoeg.wl-maz@kernel.org \
    --to=maz@kernel.org \
    --cc=joey.gouly@arm.com \
    --cc=kvmarm@lists.linux.dev \
    --cc=oupton@kernel.org \
    --cc=suzuki.poulose@arm.com \
    --cc=yuzenghui@huawei.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox