From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 19EC82F4A19 for ; Tue, 28 Oct 2025 10:38:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761647933; cv=none; b=RpUs5VeX2If9OZ7O4smYkru1i7RpFpqSfyOg0T1okswiKyjd5Z+Vq1Hv09c2Fy7ZyeDlqA2mmo18aFcK3ABHBCrpOv8IRX41qiS7PVe//VJisbXOxeropElLC13hKqqscPgaq+8fiQl8SzmFv7TroiQm6fUWi4wQRD6mZ6mIigM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761647933; c=relaxed/simple; bh=D7yB2su+JpWEU/gxLcsdAnmcL24HVifgVoD8o7Fwu1I=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=rX+NfJExr4agpiFtDT8j0rx5t7LHCcJBjzyEgr5smQFydTa2MDQGCJelBhxCkx7oQ0hqHvcA0aQGboiaQmbTZqaha/2hVU8NFbpWlVNaj1RN3Lm54aY2ZeZWy+g+Q8BurTjyTly2bvM3nC3ZYZaGtKZymaWgCawSCoqCccezuXU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Yk7xJLkI; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Yk7xJLkI" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9BAB0C4CEE7; Tue, 28 Oct 2025 10:38:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1761647932; bh=D7yB2su+JpWEU/gxLcsdAnmcL24HVifgVoD8o7Fwu1I=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Yk7xJLkIel9PFMMlHeJ002D3fvMQz/Z5vn8lYhohprnr9XfaLabSM/fMBBP2u1gI1 0x8qYRGcQVyHPIdGVC0HJpkbycdpm9Q1ubnyTIOFrG/pZSH0xSDUT/p/KCSwi7SPAx n3yXZLQp1ZWgI6XPUr+ufJnQs8CG5h/Qxcv7FIDkXIfcoqfU1Eb2UpXRpQoszXgnEw wjjj64m7fSf2dFixh9f6Va94K7gtog1pIDVGuafz3jEiiJ7wmdNCwPQX9/HpY8ZQVD eczYIQhCJTAdC5d5LnPIDd+PpQGIjOqa8NhhFJtetylb2ZDKHTdzEVC1c6N1477ak/ YXjZdqhJID6wg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1vDh6I-00000000Djq-0l4o; Tue, 28 Oct 2025 10:38:50 +0000 Date: Tue, 28 Oct 2025 10:38:49 +0000 Message-ID: <86zf9bux8m.wl-maz@kernel.org> From: Marc Zyngier To: Fuad Tabba Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, oliver.upton@linux.dev, will@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com Subject: Re: [PATCH v1 1/4] KVM: arm64: Switch reg and val parameter ordering in vcpu_write_sys_reg() In-Reply-To: <20251027113943.1282568-2-tabba@google.com> References: <20251027113943.1282568-1-tabba@google.com> <20251027113943.1282568-2-tabba@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: tabba@google.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, oliver.upton@linux.dev, will@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Mon, 27 Oct 2025 11:39:40 +0000, Fuad Tabba wrote: > > The vcpu_write_sys_reg() function previously used the signature: > void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, enum vcpu_sysreg reg); > > This was inconsistent with related functions and macros such as > __vcpu_assign_sys_reg() and __vcpu_rmw_sys_reg(), both of which > have the register parameter before the value. > '(vcpu, reg, ...)' ordering. On the other hand, write_sys_reg() is exactly in the same order as vcpu_write_sys_reg(). I think that's the model to follow. The __vcpu_*_sys_reg() helpers are internal things, really, and if something has to change, I'd rather change those. Thanks, M. -- Without deviation from the norm, progress is not possible.