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Wed, 18 Aug 2021 14:32:26 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mGMcD-005mEI-0q; Wed, 18 Aug 2021 15:32:25 +0100 Date: Wed, 18 Aug 2021 15:32:24 +0100 Message-ID: <87k0kisu13.wl-maz@kernel.org> From: Marc Zyngier To: Fuad Tabba Subject: Re: [PATCH v4 03/15] KVM: arm64: MDCR_EL2 is a 64-bit register In-Reply-To: <20210817081134.2918285-4-tabba@google.com> References: <20210817081134.2918285-1-tabba@google.com> <20210817081134.2918285-4-tabba@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: tabba@google.com, kvmarm@lists.cs.columbia.edu, will@kernel.org, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, mark.rutland@arm.com, christoffer.dall@arm.com, pbonzini@redhat.com, drjones@redhat.com, oupton@google.com, qperret@google.com, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Cc: kernel-team@android.com, kvm@vger.kernel.org, pbonzini@redhat.com, will@kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Tue, 17 Aug 2021 09:11:22 +0100, Fuad Tabba wrote: > > Fix the places in KVM that treat MDCR_EL2 as a 32-bit register. > More recent features (e.g., FEAT_SPEv1p2) use bits above 31. > > No functional change intended. > > Acked-by: Will Deacon > Signed-off-by: Fuad Tabba > --- > arch/arm64/include/asm/kvm_arm.h | 20 ++++++++++---------- > arch/arm64/include/asm/kvm_asm.h | 2 +- > arch/arm64/include/asm/kvm_host.h | 2 +- > arch/arm64/kvm/debug.c | 2 +- > arch/arm64/kvm/hyp/nvhe/debug-sr.c | 2 +- > arch/arm64/kvm/hyp/vhe/debug-sr.c | 2 +- > 6 files changed, 15 insertions(+), 15 deletions(-) > > diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h > index d436831dd706..6a523ec83415 100644 > --- a/arch/arm64/include/asm/kvm_arm.h > +++ b/arch/arm64/include/asm/kvm_arm.h > @@ -281,18 +281,18 @@ > /* Hyp Debug Configuration Register bits */ > #define MDCR_EL2_E2TB_MASK (UL(0x3)) > #define MDCR_EL2_E2TB_SHIFT (UL(24)) > -#define MDCR_EL2_TTRF (1 << 19) > -#define MDCR_EL2_TPMS (1 << 14) > +#define MDCR_EL2_TTRF (UL(1) << 19) > +#define MDCR_EL2_TPMS (UL(1) << 14) > #define MDCR_EL2_E2PB_MASK (UL(0x3)) > #define MDCR_EL2_E2PB_SHIFT (UL(12)) > -#define MDCR_EL2_TDRA (1 << 11) > -#define MDCR_EL2_TDOSA (1 << 10) > -#define MDCR_EL2_TDA (1 << 9) > -#define MDCR_EL2_TDE (1 << 8) > -#define MDCR_EL2_HPME (1 << 7) > -#define MDCR_EL2_TPM (1 << 6) > -#define MDCR_EL2_TPMCR (1 << 5) > -#define MDCR_EL2_HPMN_MASK (0x1F) > +#define MDCR_EL2_TDRA (UL(1) << 11) > +#define MDCR_EL2_TDOSA (UL(1) << 10) > +#define MDCR_EL2_TDA (UL(1) << 9) > +#define MDCR_EL2_TDE (UL(1) << 8) > +#define MDCR_EL2_HPME (UL(1) << 7) > +#define MDCR_EL2_TPM (UL(1) << 6) > +#define MDCR_EL2_TPMCR (UL(1) << 5) > +#define MDCR_EL2_HPMN_MASK (UL(0x1F)) > > /* For compatibility with fault code shared with 32-bit */ > #define FSC_FAULT ESR_ELx_FSC_FAULT > diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h > index 9f0bf2109be7..63ead9060ab5 100644 > --- a/arch/arm64/include/asm/kvm_asm.h > +++ b/arch/arm64/include/asm/kvm_asm.h > @@ -210,7 +210,7 @@ extern u64 __vgic_v3_read_vmcr(void); > extern void __vgic_v3_write_vmcr(u32 vmcr); > extern void __vgic_v3_init_lrs(void); > > -extern u32 __kvm_get_mdcr_el2(void); > +extern u64 __kvm_get_mdcr_el2(void); > > #define __KVM_EXTABLE(from, to) \ > " .pushsection __kvm_ex_table, \"a\"\n" \ > diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h > index 347781f99b6a..4d2d974c1522 100644 > --- a/arch/arm64/include/asm/kvm_host.h > +++ b/arch/arm64/include/asm/kvm_host.h > @@ -289,7 +289,7 @@ struct kvm_vcpu_arch { > > /* HYP configuration */ > u64 hcr_el2; > - u32 mdcr_el2; > + u64 mdcr_el2; This breaks an existing trace in debug.c::kvm_arm_setup_mdcr_el2(): trace_kvm_arm_set_dreg32("MDCR_EL2", vcpu->arch.mdcr_el2); which expects a 32bit value. I guess we could add an equivalent 64bit version, or silently upgrade the tracepoint to take a 64bit value. None of them are good solutions, but hey, something has to give... Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm