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Tue, 13 Jul 2021 16:00:01 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1m3KpD-00D7CY-6B; Tue, 13 Jul 2021 16:59:59 +0100 Date: Tue, 13 Jul 2021 16:59:58 +0100 Message-ID: <87mtqq6w75.wl-maz@kernel.org> From: Marc Zyngier To: "Russell King (Oracle)" Subject: Re: [PATCH 1/3] KVM: arm64: Narrow PMU sysreg reset values to architectural requirements In-Reply-To: <20210713143949.GJ22278@shell.armlinux.org.uk> References: <20210713135900.1473057-1-maz@kernel.org> <20210713135900.1473057-2-maz@kernel.org> <20210713143949.GJ22278@shell.armlinux.org.uk> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux@armlinux.org.uk, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, james.morse@arm.com, suzuki.poulose@arm.com, alexandru.elisei@arm.com, alexandre.chartre@oracle.com, robin.murphy@arm.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Cc: kernel-team@android.com, kvm@vger.kernel.org, Robin Murphy , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Tue, 13 Jul 2021 15:39:49 +0100, "Russell King (Oracle)" wrote: > > On Tue, Jul 13, 2021 at 02:58:58PM +0100, Marc Zyngier wrote: > > +static void reset_pmu_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) > > +{ > > + u64 n, mask; > > + > > + /* No PMU available, any PMU reg may UNDEF... */ > > + if (!kvm_arm_support_pmu_v3()) > > + return; > > + > > + n = read_sysreg(pmcr_el0) >> ARMV8_PMU_PMCR_N_SHIFT; > > + n &= ARMV8_PMU_PMCR_N_MASK; > > + > > + reset_unknown(vcpu, r); > > + > > + mask = BIT(ARMV8_PMU_CYCLE_IDX); > > + if (n) > > + mask |= GENMASK(n - 1, 0); > > + > > + __vcpu_sys_reg(vcpu, r->reg) &= mask; > > Would this read more logically to structure it as: > > mask = BIT(ARMV8_PMU_CYCLE_IDX); > > n = read_sysreg(pmcr_el0) >> ARMV8_PMU_PMCR_N_SHIFT; > n &= ARMV8_PMU_PMCR_N_MASK; > if (n) > mask |= GENMASK(n - 1, 0); > > reset_unknown(vcpu, r); > __vcpu_sys_reg(vcpu, r->reg) &= mask; > > ? Yup, that's nicer. Amended locally. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm