From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4D6E8E576 for ; Tue, 23 Apr 2024 11:33:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713871988; cv=none; b=k+gqoZpzjWYXrXhXXs66qtgNSBLtZLo85lIUoLgb8gLyCFr3w4P5GIin6UGPID0wW3+D4tafPb3UOwGVtD9nxZKFkc7budTVrXbmGBNN4X39mjyXd/2IRju6nPeZET6ps1xOjgI9T5iVEFifvm/yvweUB6/LyQDXYrXvMqwHGWo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713871988; c=relaxed/simple; bh=HNEJTtA/TGesL0cCJJJtqsekLkegSRTWZeBV7fPwewc=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=PekY3ik87K7GTUDHTqe5fJqwaI6L6VQeBfC99HiPZt8eEl79AuLB4leLcP6zGotLRUuz1XopjukjxPrMkBWMZLh40hQWNAgLvbA/XJ4w69YvNiYk9iwU9CMqdWcjSEo31BBKV2gnDFvEcgw/u/Q+8Mo8mmN+qp1ySAbd5pqyusw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=sy0BC9af; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="sy0BC9af" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BCD75C2BD11; Tue, 23 Apr 2024 11:33:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1713871987; bh=HNEJTtA/TGesL0cCJJJtqsekLkegSRTWZeBV7fPwewc=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=sy0BC9afjceDT3KxOj+53ZvnXRwJvLv/h4F8ask8j+J1SMrLIr7vqdkN/aQk2fzYJ gy+2HB8XWQnRmwTMTLTHxR0TQqgOJbw1j0MKpDVAgsiE4pVLZHo/wt+5qF/M9AsDqA QKuOzxnnUQpokR7bGfjzoUWXwBkNK9y/W+8yUDVmnmYRl2vvO5oSrTB6RzZyUT3BSJ CSoSYyr4LP5bRv+E89r9+uR8KucJMDTP5dxxIZYoGVLAUkRH5Gsjqsfysi7zvytyP1 ZuOS44B44kQe6zE4XyaZp+AQZ7ydQRXnzRk1gWj4QKnzDMQacMVocbYu+vh9yUWGYr Z5+/xAktdj04g== Received: from [12.161.88.66] (helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1rzEOW-0079k1-LD; Tue, 23 Apr 2024 12:33:05 +0100 Date: Tue, 23 Apr 2024 12:33:00 +0100 Message-ID: <87sezctitv.wl-maz@kernel.org> From: Marc Zyngier To: Mark Rutland Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu , Arnd Bergmann , Joey Gouly , Will Deacon , Naresh Kamboju , Linaro Kernel Functional Testing Subject: Re: [PATCH] KVM: arm64: nv: Work around lack of pauth support in old toolchains In-Reply-To: References: <20240422224849.2238222-1-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 12.161.88.66 X-SA-Exim-Rcpt-To: mark.rutland@arm.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com, arnd@arndb.de, joey.gouly@arm.com, will@kernel.org, naresh.kamboju@linaro.org, lkft@linaro.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Tue, 23 Apr 2024 09:37:04 +0100, Mark Rutland wrote: > > On Mon, Apr 22, 2024 at 11:48:49PM +0100, Marc Zyngier wrote: > > We still support GCC 8.x, and it appears that this toolchain > > does not understand "pauth" as a valid architectural extension. > > After all, it's only been 8 years since ARMv8.3 was released... > > > > This results in the NV ERETAx code breaking the build, as it relies > > on this extention to make use of the PACGA instruction. > > > > Work around it by hand-assembling the instruction using a mind-bending > > trick lifted from an old patch by Will. Magic. > > > > Fixes: e09faab353a6 ("KVM: arm64: nv: Add emulation for ERETAx instructions") > > Reported-by: Linaro Kernel Functional Testing > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/kvm/pauth.c | 19 +++++++++++++++++-- > > 1 file changed, 17 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm64/kvm/pauth.c b/arch/arm64/kvm/pauth.c > > index a3a5c404375b..8baf2a2cbdd3 100644 > > --- a/arch/arm64/kvm/pauth.c > > +++ b/arch/arm64/kvm/pauth.c > > @@ -17,6 +17,22 @@ > > #include > > #include > > > > +/* > > + * "// This is some of my finest work" (Will Deacon, 2019-02-12) > > + * > > + * The jury is still out on that one. > > + */ > > +#define REG(r) "(0%x[" #r "] - ((0%x[" #r "] >> 4) * 6))" > > + > > +/* PACGA Xd, Xn, Xm */ > > +#define PACGA(d,n,m) \ > > + asm volatile(".inst 0x9AC03000 |" \ > > + "(" REG(Rd) "<< 0) |" \ > > + "(" REG(Rn) "<< 5) |" \ > > + "(" REG(Rm) "<< 16)\n" \ > > + : [Rd] "=r" ((d)) \ > > + : [Rn] "r" ((n)), [Rm] "r" ((m))) > > Can you please use rather than open-coding this new REG() > helper? That way this'll be consistent with the way we assemble MRS/MSR in > , and it avoids the few seconds of confusion trying to figure out > the maths in the REG() helper (neat trick though!). Ah, I had completely forgot about this guy. Good call. I'll fold that patchlet in and re-push the result. Thanks, M. -- Without deviation from the norm, progress is not possible.