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Wed, 28 Jul 2021 10:38:37 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1m8gxP-001VeA-OZ; Wed, 28 Jul 2021 11:38:35 +0100 Date: Wed, 28 Jul 2021 11:38:35 +0100 Message-ID: <87wnpad8pg.wl-maz@kernel.org> From: Marc Zyngier To: Will Deacon Subject: Re: [PATCH 06/16] KVM: arm64: Force a full unmap on vpcu reinit In-Reply-To: <20210727181132.GE19173@willie-the-truck> References: <20210715163159.1480168-1-maz@kernel.org> <20210715163159.1480168-7-maz@kernel.org> <20210727181132.GE19173@willie-the-truck> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: will@kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, qperret@google.com, dbrazdil@google.com, vatsa@codeaurora.org, sdonthineni@nvidia.com, james.morse@arm.com, suzuki.poulose@arm.com, alexandru.elisei@arm.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Cc: kvm@vger.kernel.org, kernel-team@android.com, Srivatsa Vaddagiri , linux-kernel@vger.kernel.org, Shanker R Donthineni , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Tue, 27 Jul 2021 19:11:33 +0100, Will Deacon wrote: > > On Thu, Jul 15, 2021 at 05:31:49PM +0100, Marc Zyngier wrote: > > As we now keep information in the S2PT, we must be careful not > > to keep it across a VM reboot, which could otherwise lead to > > interesting problems. > > > > Make sure that the S2 is completely discarded on reset of > > a vcpu, and remove the flag that enforces the MMIO check. > > > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/kvm/arm.c | 8 +++++++- > > 1 file changed, 7 insertions(+), 1 deletion(-) > > > > diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c > > index 97ab1512c44f..b0d2225190d2 100644 > > --- a/arch/arm64/kvm/arm.c > > +++ b/arch/arm64/kvm/arm.c > > @@ -1096,12 +1096,18 @@ static int kvm_arch_vcpu_ioctl_vcpu_init(struct kvm_vcpu *vcpu, > > * ensuring that the data side is always coherent. We still > > * need to invalidate the I-cache though, as FWB does *not* > > * imply CTR_EL0.DIC. > > + * > > + * If the MMIO guard was enabled, we pay the price of a full > > + * unmap to get back to a sane state (and clear the flag). > > */ > > if (vcpu->arch.has_run_once) { > > - if (!cpus_have_final_cap(ARM64_HAS_STAGE2_FWB)) > > + if (!cpus_have_final_cap(ARM64_HAS_STAGE2_FWB) || > > + test_bit(KVM_ARCH_FLAG_MMIO_GUARD, &vcpu->kvm->arch.flags)) > > stage2_unmap_vm(vcpu->kvm); > > else > > icache_inval_all_pou(); > > + > > + clear_bit(KVM_ARCH_FLAG_MMIO_GUARD, &vcpu->kvm->arch.flags); > > What prevents this racing with another vCPU trying to set the bit? Not much. We could take the kvm lock on both ends to serialize it, but that's pretty ugly. And should we care? What is the semantic of resetting a vcpu while another is still running? If we want to support this sort of behaviour, then our tracking is totally bogus, because it is VM-wide. And you don't even have to play with that bit from another vcpu: all the information is lost at the point where we unmap the S2 PTs. Maybe an alternative is to move this to the halt/reboot PSCI handlers, making it clearer what we expect? M. -- Without deviation from the norm, progress is not possible. _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm