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Mon, 31 Aug 2026 07:59:48 +0000 Date: Mon, 31 Aug 2026 09:02:20 +0100 Message-ID: <87y0dmn2er.wl-maz@kernel.org> From: Marc Zyngier To: Khushit Shah Cc: Shameer Kolothum , "kvmarm@lists.linux.dev" , "oliver.upton@linux.dev" , "catalin.marinas@arm.com" , "will@kernel.org" , "mark.rutland@arm.com" , "cohuck@redhat.com" , "eric.auger@redhat.com" , "sebott@redhat.com" , "yuzenghui@huawei.com" , "wangzhou1@hisilicon.com" , "jiangkunkun@huawei.com" , "jonathan.cameron@huawei.com" , "anthony.jebson@huawei.com" , "linux-arm-kernel@lists.infradead.org" , "linuxarm@huawei.com" Subject: Re: [PATCH v8 5/6] smccc/kvm_guest: Enable errata based on implementation CPUs In-Reply-To: References: <20250221140229.12588-1-shameerali.kolothum.thodi@huawei.com> <20250221140229.12588-6-shameerali.kolothum.thodi@huawei.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: khushit.shah@nutanix.com, skolothumtho@nvidia.com, kvmarm@lists.linux.dev, oliver.upton@linux.dev, catalin.marinas@arm.com, will@kernel.org, mark.rutland@arm.com, cohuck@redhat.com, eric.auger@redhat.com, sebott@redhat.com, yuzenghui@huawei.com, wangzhou1@hisilicon.com, jiangkunkun@huawei.com, jonathan.cameron@huawei.com, anthony.jebson@huawei.com, linux-arm-kernel@lists.infradead.org, linuxarm@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Mon, 31 Aug 2026 05:46:19 +0100, Khushit Shah wrote: >=20 >=20 >=20 > > On 21 Feb 2025, at 7:32=E2=80=AFPM, Shameer Kolothum wrote: > >=20 > > Retrieve any migration target implementation CPUs using the hypercall > > and enable associated errata. > >=20 > > Reviewed-by: Cornelia Huck > > Reviewed-by: Sebastian Ott > > Signed-off-by: Shameer Kolothum > > --- > > arch/arm64/include/asm/cputype.h | 7 ++++ > > arch/arm64/include/asm/hypervisor.h | 1 + > > arch/arm64/kernel/cpu_errata.c | 45 +++++++++++++++++--- > > arch/arm64/kernel/cpufeature.c | 2 + > > drivers/firmware/smccc/kvm_guest.c | 64 +++++++++++++++++++++++++++++ > > 5 files changed, 114 insertions(+), 5 deletions(-) > >=20 > > diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/= cputype.h > > index ccb4a155d118..cc2d58141be1 100644 > > --- a/arch/arm64/include/asm/cputype.h > > +++ b/arch/arm64/include/asm/cputype.h > > @@ -276,6 +276,13 @@ static inline bool midr_is_cpu_model_range(u32 mid= r, u32 model, u32 rv_min, > > return _model =3D=3D model && rv >=3D rv_min && rv <=3D rv_max; > > } > >=20 > > +struct target_impl_cpu { > > + u64 midr; > > + u64 revidr; > > + u64 aidr; > > +}; > > + > > +bool cpu_errata_set_target_impl(u64 num, void *impl_cpus); > > bool is_midr_in_range_list(struct midr_range const *ranges); > >=20 > > static inline u64 __attribute_const__ read_cpuid_mpidr(void) > > diff --git a/arch/arm64/include/asm/hypervisor.h b/arch/arm64/include/a= sm/hypervisor.h > > index 409e239834d1..a12fd897c877 100644 > > --- a/arch/arm64/include/asm/hypervisor.h > > +++ b/arch/arm64/include/asm/hypervisor.h > > @@ -6,6 +6,7 @@ > >=20 > > void kvm_init_hyp_services(void); > > bool kvm_arm_hyp_service_available(u32 func_id); > > +void kvm_arm_target_impl_cpu_init(void); > >=20 > > #ifdef CONFIG_ARM_PKVM_GUEST > > void pkvm_init_hyp_services(void); > > diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_err= ata.c > > index 1f51cf6378c5..66869d81c3d5 100644 > > --- a/arch/arm64/kernel/cpu_errata.c > > +++ b/arch/arm64/kernel/cpu_errata.c > > @@ -14,10 +14,34 @@ > > #include > > #include > >=20 > > +static u64 target_impl_cpu_num; > > +static struct target_impl_cpu *target_impl_cpus; > > + > > +bool cpu_errata_set_target_impl(u64 num, void *impl_cpus) > > +{ > > + if (target_impl_cpu_num || !num || !impl_cpus) > > + return false; > > + > > + target_impl_cpu_num =3D num; > > + target_impl_cpus =3D impl_cpus; > > + return true; > > +} > > + > > static inline bool is_midr_in_range(struct midr_range const *range) > > { > > - return midr_is_cpu_model_range(read_cpuid_id(), range->model, > > - range->rv_min, range->rv_max); > > + int i; > > + > > + if (!target_impl_cpu_num) > > + return midr_is_cpu_model_range(read_cpuid_id(), range->model, > > + range->rv_min, range->rv_max); > > + > > + for (i =3D 0; i < target_impl_cpu_num; i++) { > > + if (midr_is_cpu_model_range(target_impl_cpus[i].midr, > > + range->model, > > + range->rv_min, range->rv_max)) > > + return true; > > + } > > + return false; > > } > >=20 > > bool is_midr_in_range_list(struct midr_range const *ranges) > > @@ -47,9 +71,20 @@ __is_affected_midr_range(const struct arm64_cpu_capa= bilities *entry, > > static bool __maybe_unused > > is_affected_midr_range(const struct arm64_cpu_capabilities *entry, int = scope) > > { > > - WARN_ON(scope !=3D SCOPE_LOCAL_CPU || preemptible()); > > - return __is_affected_midr_range(entry, read_cpuid_id(), > > - read_cpuid(REVIDR_EL1)); > > + int i; > > + > > + if (!target_impl_cpu_num) { > > + WARN_ON(scope !=3D SCOPE_LOCAL_CPU || preemptible()); > > + return __is_affected_midr_range(entry, read_cpuid_id(), > > + read_cpuid(REVIDR_EL1)); > > + } > > + > > + for (i =3D 0; i < target_impl_cpu_num; i++) { > > + if (__is_affected_midr_range(entry, target_impl_cpus[i].midr, > > + target_impl_cpus[i].midr)) > Typo? Shouldn't the second arg be target_impl_cpus[i].revidr? Most probably. Please send a fix. M. --=20 Jazz isn't dead. It just smells funny.