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Thu, 23 Sep 2021 12:56:24 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mTOH0-00CXDM-CP; Thu, 23 Sep 2021 13:56:22 +0100 Date: Thu, 23 Sep 2021 13:56:21 +0100 Message-ID: <87zgs3tpqi.wl-maz@kernel.org> From: Marc Zyngier To: Will Deacon Subject: Re: [PATCH 5/5] KVM: arm64: Disable privileged hypercalls after pKVM finalisation In-Reply-To: <20210923112256.15767-6-will@kernel.org> References: <20210923112256.15767-1-will@kernel.org> <20210923112256.15767-6-will@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: will@kernel.org, linux-arm-kernel@lists.infradead.org, qperret@google.com, catalin.marinas@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, kvmarm@lists.cs.columbia.edu X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Cc: Catalin Marinas , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Thu, 23 Sep 2021 12:22:56 +0100, Will Deacon wrote: > > After pKVM has been 'finalised' using the __pkvm_prot_finalize hypercall, > the calling CPU will have a Stage-2 translation enabled to prevent access > to memory pages owned by EL2. > > Although this forms a significant part of the process to deprivilege the > host kernel, we also need to ensure that the hypercall interface is > reduced so that the EL2 code cannot, for example, be re-initialised using > a new set of vectors. > > Re-order the hypercalls so that only a suffix remains available after > finalisation of pKVM. > > Cc: Marc Zyngier > Cc: Quentin Perret > Signed-off-by: Will Deacon > --- > arch/arm64/include/asm/kvm_asm.h | 43 ++++++++++++++++-------------- > arch/arm64/kvm/hyp/nvhe/hyp-main.c | 26 +++++++++++------- > 2 files changed, 39 insertions(+), 30 deletions(-) > > diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h > index e86045ac43ba..68630fd382c5 100644 > --- a/arch/arm64/include/asm/kvm_asm.h > +++ b/arch/arm64/include/asm/kvm_asm.h > @@ -43,27 +43,30 @@ > > #define KVM_HOST_SMCCC_FUNC(name) KVM_HOST_SMCCC_ID(__KVM_HOST_SMCCC_FUNC_##name) > > +/* Hypercalls available only prior to pKVM finalisation */ > #define __KVM_HOST_SMCCC_FUNC___kvm_hyp_init 0 > -#define __KVM_HOST_SMCCC_FUNC___kvm_vcpu_run 1 > -#define __KVM_HOST_SMCCC_FUNC___kvm_flush_vm_context 2 > -#define __KVM_HOST_SMCCC_FUNC___kvm_tlb_flush_vmid_ipa 3 > -#define __KVM_HOST_SMCCC_FUNC___kvm_tlb_flush_vmid 4 > -#define __KVM_HOST_SMCCC_FUNC___kvm_flush_cpu_context 5 > -#define __KVM_HOST_SMCCC_FUNC___kvm_timer_set_cntvoff 6 > -#define __KVM_HOST_SMCCC_FUNC___kvm_enable_ssbs 7 > -#define __KVM_HOST_SMCCC_FUNC___vgic_v3_get_gic_config 8 > -#define __KVM_HOST_SMCCC_FUNC___vgic_v3_read_vmcr 9 > -#define __KVM_HOST_SMCCC_FUNC___vgic_v3_write_vmcr 10 > -#define __KVM_HOST_SMCCC_FUNC___vgic_v3_init_lrs 11 > -#define __KVM_HOST_SMCCC_FUNC___kvm_get_mdcr_el2 12 > -#define __KVM_HOST_SMCCC_FUNC___vgic_v3_save_aprs 13 > -#define __KVM_HOST_SMCCC_FUNC___vgic_v3_restore_aprs 14 > -#define __KVM_HOST_SMCCC_FUNC___pkvm_init 15 > -#define __KVM_HOST_SMCCC_FUNC___pkvm_host_share_hyp 16 > -#define __KVM_HOST_SMCCC_FUNC___pkvm_create_private_mapping 17 > -#define __KVM_HOST_SMCCC_FUNC___pkvm_cpu_set_vector 18 > -#define __KVM_HOST_SMCCC_FUNC___pkvm_prot_finalize 19 > -#define __KVM_HOST_SMCCC_FUNC___kvm_adjust_pc 20 > +#define __KVM_HOST_SMCCC_FUNC___kvm_get_mdcr_el2 1 > +#define __KVM_HOST_SMCCC_FUNC___pkvm_init 2 > +#define __KVM_HOST_SMCCC_FUNC___pkvm_create_private_mapping 3 > +#define __KVM_HOST_SMCCC_FUNC___pkvm_cpu_set_vector 4 > +#define __KVM_HOST_SMCCC_FUNC___kvm_enable_ssbs 5 > +#define __KVM_HOST_SMCCC_FUNC___vgic_v3_init_lrs 6 > +#define __KVM_HOST_SMCCC_FUNC___vgic_v3_get_gic_config 7 > +#define __KVM_HOST_SMCCC_FUNC___pkvm_prot_finalize 8 > + > +/* Hypercalls available after pKVM finalisation */ > +#define __KVM_HOST_SMCCC_FUNC___pkvm_host_share_hyp 9 > +#define __KVM_HOST_SMCCC_FUNC___kvm_adjust_pc 10 > +#define __KVM_HOST_SMCCC_FUNC___kvm_vcpu_run 11 > +#define __KVM_HOST_SMCCC_FUNC___kvm_flush_vm_context 12 > +#define __KVM_HOST_SMCCC_FUNC___kvm_tlb_flush_vmid_ipa 13 > +#define __KVM_HOST_SMCCC_FUNC___kvm_tlb_flush_vmid 14 > +#define __KVM_HOST_SMCCC_FUNC___kvm_flush_cpu_context 15 > +#define __KVM_HOST_SMCCC_FUNC___kvm_timer_set_cntvoff 16 > +#define __KVM_HOST_SMCCC_FUNC___vgic_v3_read_vmcr 17 > +#define __KVM_HOST_SMCCC_FUNC___vgic_v3_write_vmcr 18 > +#define __KVM_HOST_SMCCC_FUNC___vgic_v3_save_aprs 19 > +#define __KVM_HOST_SMCCC_FUNC___vgic_v3_restore_aprs 20 > > #ifndef __ASSEMBLY__ > > diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/hyp-main.c > index 2da6aa8da868..4120e34288e1 100644 > --- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c > +++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c > @@ -165,36 +165,42 @@ typedef void (*hcall_t)(struct kvm_cpu_context *); > #define HANDLE_FUNC(x) [__KVM_HOST_SMCCC_FUNC_##x] = (hcall_t)handle_##x > > static const hcall_t host_hcall[] = { > - HANDLE_FUNC(__kvm_vcpu_run), > + /* ___kvm_hyp_init */ > + HANDLE_FUNC(__kvm_get_mdcr_el2), > + HANDLE_FUNC(__pkvm_init), > + HANDLE_FUNC(__pkvm_create_private_mapping), > + HANDLE_FUNC(__pkvm_cpu_set_vector), > + HANDLE_FUNC(__kvm_enable_ssbs), > + HANDLE_FUNC(__vgic_v3_init_lrs), > + HANDLE_FUNC(__pkvm_prot_finalize), > + > + HANDLE_FUNC(__pkvm_host_share_hyp), > HANDLE_FUNC(__kvm_adjust_pc), > + HANDLE_FUNC(__kvm_vcpu_run), > HANDLE_FUNC(__kvm_flush_vm_context), > HANDLE_FUNC(__kvm_tlb_flush_vmid_ipa), > HANDLE_FUNC(__kvm_tlb_flush_vmid), > HANDLE_FUNC(__kvm_flush_cpu_context), > HANDLE_FUNC(__kvm_timer_set_cntvoff), > - HANDLE_FUNC(__kvm_enable_ssbs), > HANDLE_FUNC(__vgic_v3_get_gic_config), > HANDLE_FUNC(__vgic_v3_read_vmcr), > HANDLE_FUNC(__vgic_v3_write_vmcr), > - HANDLE_FUNC(__vgic_v3_init_lrs), > - HANDLE_FUNC(__kvm_get_mdcr_el2), > HANDLE_FUNC(__vgic_v3_save_aprs), > HANDLE_FUNC(__vgic_v3_restore_aprs), > - HANDLE_FUNC(__pkvm_init), > - HANDLE_FUNC(__pkvm_cpu_set_vector), > - HANDLE_FUNC(__pkvm_host_share_hyp), > - HANDLE_FUNC(__pkvm_create_private_mapping), > - HANDLE_FUNC(__pkvm_prot_finalize), > }; > > static void handle_host_hcall(struct kvm_cpu_context *host_ctxt) > { > DECLARE_REG(unsigned long, id, host_ctxt, 0); > + unsigned long hcall_min = 0; > hcall_t hfn; > > + if (static_branch_unlikely(&kvm_protected_mode_initialized)) > + hcall_min = __KVM_HOST_SMCCC_FUNC___pkvm_prot_finalize; > + > id -= KVM_HOST_SMCCC_ID(0); > > - if (unlikely(id >= ARRAY_SIZE(host_hcall))) > + if (unlikely(id < hcall_min || id >= ARRAY_SIZE(host_hcall))) So I can still issue a pkvm_prot_finalize after finalisation? Seems odd. As hcall_min has to be inclusive, you probably want it to be set to __KVM_HOST_SMCCC_FUNC___pkvm_host_share_hyp once protected. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm