Re: [PATCH 20/31] KVM: arm64: vgic-v3: Add ICV_IGNREN0_EL1 handler

Auger Eric
2017-05-30T09:44:25Z

Hi,

On 03/05/2017 12:45, Marc Zyngier wrote:
> Add a handler for reading/writing the guest's view of the ICC_IGRPEN0_EL1
> register, which is located in the ICH_VMCR_EL2.VENG0 field.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>

Eric
> ---
> arch/arm64/include/asm/sysreg.h | 1 +
> virt/kvm/arm/hyp/vgic-v3-sr.c | 23 +++++++++++++++++++++++
> 2 files changed, 24 insertions(+)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index d20be0b28ca4..ba93bc7ac8e4 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -190,6 +190,7 @@
> #define SYS_ICC_BPR1_EL1 sys_reg(3, 0, 12, 12, 3)
> #define SYS_ICC_CTLR_EL1 sys_reg(3, 0, 12, 12, 4)
> #define SYS_ICC_SRE_EL1 sys_reg(3, 0, 12, 12, 5)
> +#define SYS_ICC_GRPEN0_EL1 sys_reg(3, 0, 12, 12, 6)
> #define SYS_ICC_GRPEN1_EL1 sys_reg(3, 0, 12, 12, 7)
>
> #define SYS_CONTEXTIDR_EL1 sys_reg(3, 0, 13, 0, 1)
> diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/arm/hyp/vgic-v3-sr.c
> index b21bb0c77ec2..77d5d12389ec 100644
> --- a/virt/kvm/arm/hyp/vgic-v3-sr.c
> +++ b/virt/kvm/arm/hyp/vgic-v3-sr.c
> @@ -649,11 +649,28 @@ static void __hyp_text __vgic_v3_write_eoir(struct kvm_vcpu *vcpu, u32 vmcr, int
> __vgic_v3_clear_active_lr(lr, lr_val);
> }
>
> +static void __hyp_text __vgic_v3_read_igrpen0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
> +{
> + vcpu_set_reg(vcpu, rt, !!(vmcr & ICH_VMCR_ENG0_MASK));
> +}
> +
> static void __hyp_text __vgic_v3_read_igrpen1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
> {
> vcpu_set_reg(vcpu, rt, !!(vmcr & ICH_VMCR_ENG1_MASK));
> }
>
> +static void __hyp_text __vgic_v3_write_igrpen0(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
> +{
> + u64 val = vcpu_get_reg(vcpu, rt);
> +
> + if (val & 1)
> + vmcr |= ICH_VMCR_ENG0_MASK;
> + else
> + vmcr &= ~ICH_VMCR_ENG0_MASK;
> +
> + __vgic_v3_write_vmcr(vmcr);
> +}
> +
> static void __hyp_text __vgic_v3_write_igrpen1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
> {
> u64 val = vcpu_get_reg(vcpu, rt);
> @@ -876,6 +893,12 @@ int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu)
> case SYS_ICC_HPPIR1_EL1:
> fn = __vgic_v3_read_hppir;
> break;
> + case SYS_ICC_GRPEN0_EL1:
> + if (is_read)
> + fn = __vgic_v3_read_igrpen0;
> + else
> + fn = __vgic_v3_write_igrpen0;
> + break;
> case SYS_ICC_BPR0_EL1:
> if (is_read)
> fn = __vgic_v3_read_bpr0;
>