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([2001:b07:6468:f312:9af8:e5f5:7516:fa89]) by smtp.googlemail.com with ESMTPSA id 1-20020a170906218100b0072af4af2f46sm750652eju.74.2022.08.26.03.50.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 26 Aug 2022 03:50:26 -0700 (PDT) Message-ID: <9e7cb09c-82c5-9492-bccd-5511f5bede26@redhat.com> Date: Fri, 26 Aug 2022 12:50:24 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.12.0 To: Marc Zyngier , Peter Xu References: <20220819005601.198436-1-gshan@redhat.com> <20220819005601.198436-2-gshan@redhat.com> <87lerkwtm5.wl-maz@kernel.org> <41fb5a1f-29a9-e6bb-9fab-4c83a2a8fce5@redhat.com> <87fshovtu0.wl-maz@kernel.org> <171d0159-4698-354b-8b2f-49d920d03b1b@redhat.com> <87bksawz0w.wl-maz@kernel.org> <878rnewpaw.wl-maz@kernel.org> From: Paolo Bonzini Subject: Re: [PATCH v1 1/5] KVM: arm64: Enable ring-based dirty memory tracking In-Reply-To: <878rnewpaw.wl-maz@kernel.org> X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Cc: shuah@kernel.org, shan.gavin@gmail.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, corbet@lwn.net, linux-kernel@vger.kernel.org, zhenyzha@redhat.com, bgardon@google.com, will@kernel.org, linux-kselftest@vger.kernel.org, catalin.marinas@arm.com, dmatlack@google.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On 8/24/22 00:47, Marc Zyngier wrote: >> I definitely don't think I 100% understand all the ordering things since >> they're complicated.. but my understanding is that the reset procedure >> didn't need memory barrier (unlike pushing, where we have explicit wmb), >> because we assumed the userapp is not hostile so logically it should only >> modify the flags which is a 32bit field, assuming atomicity guaranteed. > Atomicity doesn't guarantee ordering, unfortunately. Take the > following example: CPU0 is changing a bunch of flags for GFNs A, B, C, > D that exist in the ring in that order, and CPU1 performs an ioctl to > reset the page state. > > CPU0: > write_flag(A, KVM_DIRTY_GFN_F_RESET) > write_flag(B, KVM_DIRTY_GFN_F_RESET) > write_flag(C, KVM_DIRTY_GFN_F_RESET) > write_flag(D, KVM_DIRTY_GFN_F_RESET) > [...] > > CPU1: > ioctl(KVM_RESET_DIRTY_RINGS) > > Since CPU0 writes do not have any ordering, CPU1 can observe the > writes in a sequence that have nothing to do with program order, and > could for example observe that GFN A and D have been reset, but not B > and C. This in turn breaks the logic in the reset code (B, C, and D > don't get reset), despite userspace having followed the spec to the > letter. If each was a store-release (which is the case on x86), it > wouldn't be a problem, but nothing calls it in the documentation. > > Maybe that's not a big deal if it is expected that each CPU will issue > a KVM_RESET_DIRTY_RINGS itself, ensuring that it observe its own > writes. But expecting this to work across CPUs without any barrier is > wishful thinking. Agreed, but that's a problem for userspace to solve. If userspace wants to reset the fields in different CPUs, it has to synchronize with its own invoking of the ioctl. That is, CPU0 must ensure that a ioctl(KVM_RESET_DIRTY_RINGS) is done after (in the memory-ordering sense) its last write_flag(D, KVM_DIRTY_GFN_F_RESET). If there's no such ordering, there's no guarantee that the write_flag will have any effect. The main reason why I preferred a global KVM_RESET_DIRTY_RINGS ioctl was because it takes kvm->slots_lock so the execution would be serialized anyway. Turning slots_lock into an rwsem would be even worse because it also takes kvm->mmu_lock (since slots_lock is a mutex, at least two concurrent invocations won't clash with each other on the mmu_lock). Paolo _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm