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[34.168.104.7]) by smtp.gmail.com with ESMTPSA id z25-20020aa79499000000b0056ca3569a66sm9483483pfk.129.2022.11.15.17.56.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Nov 2022 17:56:16 -0800 (PST) Date: Wed, 16 Nov 2022 01:56:12 +0000 From: Sean Christopherson To: "Huang, Kai" Subject: Re: [PATCH 33/44] KVM: x86: Do VMX/SVM support checks directly in vendor code Message-ID: References: <20221102231911.3107438-1-seanjc@google.com> <20221102231911.3107438-34-seanjc@google.com> <95c3cce88560024566f3b4b0061ca7e62a8a4286.camel@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <95c3cce88560024566f3b4b0061ca7e62a8a4286.camel@intel.com> Cc: "mjrosato@linux.ibm.com" , "david@redhat.com" , "Yao, Yuan" , "linux-mips@vger.kernel.org" , "linux-riscv@lists.infradead.org" , "imbrenda@linux.ibm.com" , "kvmarm@lists.cs.columbia.edu" , "linux-s390@vger.kernel.org" , "frankja@linux.ibm.com" , "mpe@ellerman.id.au" , "chenhuacai@kernel.org" , "aleksandar.qemu.devel@gmail.com" , "borntraeger@linux.ibm.com" , "Gao, Chao" , "farman@linux.ibm.com" , "aou@eecs.berkeley.edu" , "kvm@vger.kernel.org" , "paul.walmsley@sifive.com" , "kvmarm@lists.linux.dev" , "tglx@linutronix.de" , "linux-arm-kernel@lists.infradead.org" , "Yamahata, Isaku" , "atishp@atishpatra.org" , "farosas@linux.ibm.com" , "linux-kernel@vger.kernel.org" , "palmer@dabbelt.com" , "kvm-riscv@lists.infradead.org" , "maz@kernel.org" , "pbonzini@redhat.com" , "vkuznets@redhat.com" , "linuxppc-dev@lists.ozlabs.org" X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Tue, Nov 15, 2022, Huang, Kai wrote: > On Wed, 2022-11-02 at 23:19 +0000, Sean Christopherson wrote: > > +static bool __init kvm_is_vmx_supported(void) > > +{ > > + if (!cpu_has_vmx()) { > > + pr_err("CPU doesn't support VMX\n"); > > + return false; > > + } > > + > > + if (!boot_cpu_has(X86_FEATURE_MSR_IA32_FEAT_CTL) || > > + =A0=A0=A0 !boot_cpu_has(X86_FEATURE_VMX)) { > > + pr_err("VMX not enabled in MSR_IA32_FEAT_CTL\n"); > > + return false; > > + } > > + > > + return true; > > +} > > + > > =A0static int __init vmx_check_processor_compat(void) > > =A0{ > > =A0 struct vmcs_config vmcs_conf; > > =A0 struct vmx_capability vmx_cap; > > =A0 > > - if (!this_cpu_has(X86_FEATURE_MSR_IA32_FEAT_CTL) || > > - =A0=A0=A0 !this_cpu_has(X86_FEATURE_VMX)) { > > - pr_err("VMX is disabled on CPU %d\n", smp_processor_id()); > > + if (!kvm_is_vmx_supported()) > > =A0 return -EIO; > > - } > > =A0 > = > Looks there's a functional change here -- the old code checks local cpu's > feature bits but the new code always checks bsp's feature bits. Should h= ave no > problem I think, though. Ouch. The bad check will defeat the purpose of doing compat checks. Nice = catch! _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f174.google.com (mail-pl1-f174.google.com [209.85.214.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 91C737C for ; Wed, 16 Nov 2022 01:56:17 +0000 (UTC) Received: by mail-pl1-f174.google.com with SMTP id 4so15139391pli.0 for ; Tue, 15 Nov 2022 17:56:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=KVMI/nFFiiWGPsODZP4uTO9+eDXKExXBhUQy4MPYB78=; b=ZkhmtpyvuQjtpiKcSTwV4FQaNI1BndPmVfYwRbI4kyGyIBWLGYAK9adsViZh/yHJ7x GuxgtogV7PtxaPytplYxo+Klt0B/2ry2vtbUojn3VI5CZqcW98TXvlxs8G1FSU2NCLPG osV9xc1d2y7cg0+wNaz5Nf0N26qzO6pIP5sDWfotE89nSnvse7sYp7t8PQ00S927CjrN Mt9iItQr7ceVWaHS8qhCiI1BYymChnkKt5hyJqGOY0FEweE8dtCPm+eSBErPLu7yhTm8 o9dFADTr9ZdWsubEfckpwD5DI+8OZmAD6JfaYPF77XPfSWF6ATOhEkaqdt7s4F4xOEiQ xj8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=KVMI/nFFiiWGPsODZP4uTO9+eDXKExXBhUQy4MPYB78=; b=gUCdrnHateWe+L+lEZqHAVRlZU+OJyHwQEhbIPp8v3XY7XwB8sAASopVX0/zqcZRe4 ryB3dlo2+RspDtLjdqtccoa3ME2l4vp7603BROnKNqiYpqaSGbgj9ap1ZFy7ySCVgTke iB6/Lm4o93Zom+5ESQ4zPKHVYUDIOZ5m0nzJn/6XiBg1VxqZmGLW1iyFjno4k/6BBPtI 8m6fGOjMZBtfk0egVIctxMoNsPosfq/56a/QuZC1RnHK6k4wQ7F6LAhI71pcGkysWe6L GLbRydwK8faXFz9jEuA8d2u5kZ6a4KC6Y1mBVjr7tUaayYQEiBTR9idZxWFG1T+9+60q QOeQ== X-Gm-Message-State: ANoB5plceOVOZkHpLd5okAQCrxMVQ4wCrshxO6KdqNa7Ac+YMivEEqHz k3ncRgdsUIiEotifcYPfKlzf2A== X-Google-Smtp-Source: AA0mqf6H0QJ9u7lmf5OzgdM3vacJIFtJ+zbl369j6MJCYNSFKT6kmzTaZY88ji+zMgthkUAHrSJWdg== X-Received: by 2002:a17:90a:5883:b0:218:f84:3f98 with SMTP id j3-20020a17090a588300b002180f843f98mr1206419pji.238.1668563776878; Tue, 15 Nov 2022 17:56:16 -0800 (PST) Received: from google.com (7.104.168.34.bc.googleusercontent.com. [34.168.104.7]) by smtp.gmail.com with ESMTPSA id z25-20020aa79499000000b0056ca3569a66sm9483483pfk.129.2022.11.15.17.56.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Nov 2022 17:56:16 -0800 (PST) Date: Wed, 16 Nov 2022 01:56:12 +0000 From: Sean Christopherson To: "Huang, Kai" Cc: "imbrenda@linux.ibm.com" , "aou@eecs.berkeley.edu" , "mjrosato@linux.ibm.com" , "vkuznets@redhat.com" , "farman@linux.ibm.com" , "chenhuacai@kernel.org" , "paul.walmsley@sifive.com" , "palmer@dabbelt.com" , "maz@kernel.org" , "anup@brainfault.org" , "pbonzini@redhat.com" , "borntraeger@linux.ibm.com" , "aleksandar.qemu.devel@gmail.com" , "frankja@linux.ibm.com" , "oliver.upton@linux.dev" , "kvm@vger.kernel.org" , "Yao, Yuan" , "farosas@linux.ibm.com" , "david@redhat.com" , "james.morse@arm.com" , "mpe@ellerman.id.au" , "alexandru.elisei@arm.com" , "linux-s390@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "tglx@linutronix.de" , "Yamahata, Isaku" , "kvmarm@lists.linux.dev" , "suzuki.poulose@arm.com" , "kvm-riscv@lists.infradead.org" , "linuxppc-dev@lists.ozlabs.org" , "linux-arm-kernel@lists.infradead.org" , "linux-mips@vger.kernel.org" , "kvmarm@lists.cs.columbia.edu" , "Gao, Chao" , "atishp@atishpatra.org" , "linux-riscv@lists.infradead.org" Subject: Re: [PATCH 33/44] KVM: x86: Do VMX/SVM support checks directly in vendor code Message-ID: References: <20221102231911.3107438-1-seanjc@google.com> <20221102231911.3107438-34-seanjc@google.com> <95c3cce88560024566f3b4b0061ca7e62a8a4286.camel@intel.com> Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <95c3cce88560024566f3b4b0061ca7e62a8a4286.camel@intel.com> Message-ID: <20221116015612.6jcKaflJ8U4f6jF7OfNxTwDTcv_JdqdWV4_FLob6yoA@z> On Tue, Nov 15, 2022, Huang, Kai wrote: > On Wed, 2022-11-02 at 23:19 +0000, Sean Christopherson wrote: > > +static bool __init kvm_is_vmx_supported(void) > > +{ > > + if (!cpu_has_vmx()) { > > + pr_err("CPU doesn't support VMX\n"); > > + return false; > > + } > > + > > + if (!boot_cpu_has(X86_FEATURE_MSR_IA32_FEAT_CTL) || > > +     !boot_cpu_has(X86_FEATURE_VMX)) { > > + pr_err("VMX not enabled in MSR_IA32_FEAT_CTL\n"); > > + return false; > > + } > > + > > + return true; > > +} > > + > >  static int __init vmx_check_processor_compat(void) > >  { > >   struct vmcs_config vmcs_conf; > >   struct vmx_capability vmx_cap; > >   > > - if (!this_cpu_has(X86_FEATURE_MSR_IA32_FEAT_CTL) || > > -     !this_cpu_has(X86_FEATURE_VMX)) { > > - pr_err("VMX is disabled on CPU %d\n", smp_processor_id()); > > + if (!kvm_is_vmx_supported()) > >   return -EIO; > > - } > >   > > Looks there's a functional change here -- the old code checks local cpu's > feature bits but the new code always checks bsp's feature bits. Should have no > problem I think, though. Ouch. The bad check will defeat the purpose of doing compat checks. Nice catch!