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[35.233.69.230]) by smtp.gmail.com with ESMTPSA id s18sm22046028wrr.27.2021.03.15.09.56.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Mar 2021 09:56:24 -0700 (PDT) Date: Mon, 15 Mar 2021 16:56:21 +0000 From: Quentin Perret To: Will Deacon Subject: Re: [PATCH v5 14/36] KVM: arm64: Provide __flush_dcache_area at EL2 Message-ID: References: <20210315143536.214621-1-qperret@google.com> <20210315143536.214621-15-qperret@google.com> <20210315163322.GE3430@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210315163322.GE3430@willie-the-truck> Cc: android-kvm@google.com, catalin.marinas@arm.com, mate.toth-pal@arm.com, seanjc@google.com, tabba@google.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, maz@kernel.org, kernel-team@android.com, kvmarm@lists.cs.columbia.edu X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Monday 15 Mar 2021 at 16:33:23 (+0000), Will Deacon wrote: > On Mon, Mar 15, 2021 at 02:35:14PM +0000, Quentin Perret wrote: > > We will need to do cache maintenance at EL2 soon, so compile a copy of > > __flush_dcache_area at EL2, and provide a copy of arm64_ftr_reg_ctrel0 > > as it is needed by the read_ctr macro. > > > > Signed-off-by: Quentin Perret > > --- > > arch/arm64/include/asm/kvm_cpufeature.h | 2 ++ > > arch/arm64/kvm/hyp/nvhe/Makefile | 3 ++- > > arch/arm64/kvm/hyp/nvhe/cache.S | 13 +++++++++++++ > > arch/arm64/kvm/sys_regs.c | 1 + > > 4 files changed, 18 insertions(+), 1 deletion(-) > > create mode 100644 arch/arm64/kvm/hyp/nvhe/cache.S > > > > diff --git a/arch/arm64/include/asm/kvm_cpufeature.h b/arch/arm64/include/asm/kvm_cpufeature.h > > index 3fd9f60d2180..efba1b89b8a4 100644 > > --- a/arch/arm64/include/asm/kvm_cpufeature.h > > +++ b/arch/arm64/include/asm/kvm_cpufeature.h > > @@ -13,3 +13,5 @@ > > #define KVM_HYP_CPU_FTR_REG(name) extern struct arm64_ftr_reg kvm_nvhe_sym(name) > > #endif > > #endif > > + > > +KVM_HYP_CPU_FTR_REG(arm64_ftr_reg_ctrel0); > > I still think this is a bit weird. If you really want to macro-ise stuff, > then why not follow the sort of thing we do for e.g. per-cpu variables and > have separate DECLARE_HYP_CPU_FTR_REG and DEFINE_HYP_CPU_FTR_REG macros. > > That way kvm_cpufeature.h can have header guards like a normal header and > we can drop the '#ifndef KVM_HYP_CPU_FTR_REG' altogether. I don't think > the duplication of the symbol name really matters -- it should fail at > build time if something is missing. I just tend to hate unnecessary boilerplate, but if you feel strongly about it, happy to change :) Cheers, Quentin _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm