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[35.233.69.230]) by smtp.gmail.com with ESMTPSA id s20sm3833269wmj.36.2021.03.05.01.17.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Mar 2021 01:17:19 -0800 (PST) Date: Fri, 5 Mar 2021 09:17:16 +0000 From: Quentin Perret To: Will Deacon Subject: Re: [PATCH v3 24/32] KVM: arm64: Reserve memory for host stage 2 Message-ID: References: <20210302150002.3685113-1-qperret@google.com> <20210302150002.3685113-25-qperret@google.com> <20210304194953.GD21950@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210304194953.GD21950@willie-the-truck> Cc: android-kvm@google.com, catalin.marinas@arm.com, mate.toth-pal@arm.com, seanjc@google.com, tabba@google.com, linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, maz@kernel.org, kernel-team@android.com, kvmarm@lists.cs.columbia.edu X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Thursday 04 Mar 2021 at 19:49:53 (+0000), Will Deacon wrote: > On Tue, Mar 02, 2021 at 02:59:54PM +0000, Quentin Perret wrote: > > Extend the memory pool allocated for the hypervisor to include enough > > pages to map all of memory at page granularity for the host stage 2. > > While at it, also reserve some memory for device mappings. > > > > Signed-off-by: Quentin Perret > > --- > > arch/arm64/kvm/hyp/include/nvhe/mm.h | 23 ++++++++++++++++++++++- > > arch/arm64/kvm/hyp/nvhe/setup.c | 12 ++++++++++++ > > arch/arm64/kvm/hyp/reserved_mem.c | 2 ++ > > 3 files changed, 36 insertions(+), 1 deletion(-) > > > > diff --git a/arch/arm64/kvm/hyp/include/nvhe/mm.h b/arch/arm64/kvm/hyp/include/nvhe/mm.h > > index ac0f7fcffd08..411a35db949c 100644 > > --- a/arch/arm64/kvm/hyp/include/nvhe/mm.h > > +++ b/arch/arm64/kvm/hyp/include/nvhe/mm.h > > @@ -53,7 +53,7 @@ static inline unsigned long __hyp_pgtable_max_pages(unsigned long nr_pages) > > return total; > > } > > > > -static inline unsigned long hyp_s1_pgtable_pages(void) > > +static inline unsigned long __hyp_pgtable_total_pages(void) > > { > > unsigned long res = 0, i; > > > > @@ -63,9 +63,30 @@ static inline unsigned long hyp_s1_pgtable_pages(void) > > res += __hyp_pgtable_max_pages(reg->size >> PAGE_SHIFT); > > } > > > > + return res; > > +} > > + > > +static inline unsigned long hyp_s1_pgtable_pages(void) > > +{ > > + unsigned long res; > > + > > + res = __hyp_pgtable_total_pages(); > > + > > /* Allow 1 GiB for private mappings */ > > res += __hyp_pgtable_max_pages(SZ_1G >> PAGE_SHIFT); > > > > return res; > > } > > + > > +static inline unsigned long host_s2_mem_pgtable_pages(void) > > +{ > > + return __hyp_pgtable_total_pages() + 16; > > Is this 16 due to the possibility of a concatenated pgd? Yes it is, to be sure we have a safe upper-bound. > If so, please add a comment to that effect. Will do, thanks. Quentin _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm