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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id e11sm6590628pfn.49.2021.08.27.07.58.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 07:58:38 -0700 (PDT) Date: Fri, 27 Aug 2021 14:58:35 +0000 From: Sean Christopherson To: Peter Zijlstra Subject: Re: [PATCH 07/15] KVM: Use dedicated flag to track if KVM is handling an NMI from guest Message-ID: References: <20210827005718.585190-1-seanjc@google.com> <20210827005718.585190-8-seanjc@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Mailman-Approved-At: Fri, 27 Aug 2021 11:20:29 -0400 Cc: Wanpeng Li , kvm@vger.kernel.org, Alexander Shishkin , Catalin Marinas , Guo Ren , "H. Peter Anvin" , linux-riscv@lists.infradead.org, Vincent Chen , Jiri Olsa , Boris Ostrovsky , Stefano Stabellini , xen-devel@lists.xenproject.org, Marc Zyngier , Joerg Roedel , x86@kernel.org, linux-csky@vger.kernel.org, kvmarm@lists.cs.columbia.edu, Ingo Molnar , Like Xu , Albert Ou , Zhu Lingshan , Will Deacon , Arnaldo Carvalho de Melo , Borislav Petkov , Greentime Hu , Paul Walmsley , Namhyung Kim , Thomas Gleixner , Artem Kashkanov , linux-arm-kernel@lists.infradead.org, Jim Mattson , Juergen Gross , Nick Hu , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Palmer Dabbelt , Paolo Bonzini , Vitaly Kuznetsov X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Fri, Aug 27, 2021, Peter Zijlstra wrote: > On Thu, Aug 26, 2021 at 05:57:10PM -0700, Sean Christopherson wrote: > > diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h > > index 5cedc0e8a5d5..4c5ba4128b38 100644 > > --- a/arch/x86/kvm/x86.h > > +++ b/arch/x86/kvm/x86.h > > @@ -395,9 +395,10 @@ static inline void kvm_unregister_perf_callbacks(void) > > > > DECLARE_PER_CPU(struct kvm_vcpu *, current_vcpu); > > > > -static inline void kvm_before_interrupt(struct kvm_vcpu *vcpu) > > +static inline void kvm_before_interrupt(struct kvm_vcpu *vcpu, bool is_nmi) > > { > > __this_cpu_write(current_vcpu, vcpu); > > + WRITE_ONCE(vcpu->arch.handling_nmi_from_guest, is_nmi); > > > > kvm_register_perf_callbacks(); > > } > > @@ -406,6 +407,7 @@ static inline void kvm_after_interrupt(struct kvm_vcpu *vcpu) > > { > > kvm_unregister_perf_callbacks(); > > > > + WRITE_ONCE(vcpu->arch.handling_nmi_from_guest, false); > > __this_cpu_write(current_vcpu, NULL); > > } > > Does this rely on kvm_{,un}register_perf_callback() being a function > call and thus implying a sequence point to order the stores? No, I'm just terrible at remembering which macros provide what ordering guarantees, i.e. I was thinking WRITE_ONCE provided guarantees against compiler reordering. _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm