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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id fy8sm186294pjb.47.2021.10.26.07.48.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Oct 2021 07:48:06 -0700 (PDT) Date: Tue, 26 Oct 2021 14:48:02 +0000 From: Sean Christopherson To: Christian Borntraeger Subject: Re: [PATCH v2 00/43] KVM: Halt-polling and x86 APICv overhaul Message-ID: References: <20211009021236.4122790-1-seanjc@google.com> <04b1a72e-47b4-4bde-eb9e-ba36c156ff0d@de.ibm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <04b1a72e-47b4-4bde-eb9e-ba36c156ff0d@de.ibm.com> Cc: Cornelia Huck , Wanpeng Li , kvm@vger.kernel.org, David Hildenbrand , linux-kernel@vger.kernel.org, Paul Mackerras , Atish Patra , linux-riscv@lists.infradead.org, Claudio Imbrenda , kvmarm@lists.cs.columbia.edu, Janosch Frank , Marc Zyngier , Joerg Roedel , Huacai Chen , Aleksandar Markovic , Albert Ou , kvm-ppc@vger.kernel.org, Paul Walmsley , David Matlack , linux-arm-kernel@lists.infradead.org, Jim Mattson , Anup Patel , linux-mips@vger.kernel.org, Palmer Dabbelt , kvm-riscv@lists.infradead.org, Paolo Bonzini , Vitaly Kuznetsov X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Tue, Oct 26, 2021, Christian Borntraeger wrote: > Am 09.10.21 um 04:11 schrieb Sean Christopherson: > > This is basically two series smushed into one. The first "half" aims > > to differentiate between "halt" and a more generic "block", where "halt" > > aligns with x86's HLT instruction, the halt-polling mechanisms, and > > associated stats, and "block" means any guest action that causes the vCPU > > to block/wait. > > > > The second "half" overhauls x86's APIC virtualization code (Posted > > Interrupts on Intel VMX, AVIC on AMD SVM) to do their updates in response > > to vCPU (un)blocking in the vcpu_load/put() paths, keying off of the > > vCPU's rcuwait status to determine when a blocking vCPU is being put and > > reloaded. This idea comes from arm64's kvm_timer_vcpu_put(), which I > > stumbled across when diving into the history of arm64's (un)blocking hooks. > > > > The x86 APICv overhaul allows for killing off several sets of hooks in > > common KVM and in x86 KVM (to the vendor code). Moving everything to > > vcpu_put/load() also realizes nice cleanups, especially for the Posted > > Interrupt code, which required some impressive mental gymnastics to > > understand how vCPU task migration interacted with vCPU blocking. > > > > Non-x86 folks, sorry for the noise. I'm hoping the common parts can get > > applied without much fuss so that future versions can be x86-only. > > > > v2: > > - Collect reviews. [Christian, David] > > - Add patch to move arm64 WFI functionality out of hooks. [Marc] > > - Add RISC-V to the fun. > > - Add all the APICv fun. > > Have we actually followed up on the regression regarding halt_poll_ns=0 no longer disabling > polling for running systems? No, I have that conversation flagged but haven't gotten back to it. I still like the idea of special casing halt_poll_ns=0 to override the capability. I can send a proper patch for that unless there's a different/better idea? _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm