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[34.68.225.194]) by smtp.gmail.com with ESMTPSA id m4-20020a0566022e8400b006463059bf2fsm13739427iow.49.2022.04.07.16.13.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Apr 2022 16:13:28 -0700 (PDT) Date: Thu, 7 Apr 2022 23:13:24 +0000 From: Oliver Upton To: Marc Zyngier Subject: Re: [PATCH v2 3/4] KVM: arm64: vgic-v3: Implement MMIO-based LPI invalidation Message-ID: References: <20220405182327.205520-1-maz@kernel.org> <20220405182327.205520-4-maz@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220405182327.205520-4-maz@kernel.org> Cc: Lorenzo Pieralisi , kvm@vger.kernel.org, Andre Przywara , kernel-team@android.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Tue, Apr 05, 2022 at 07:23:26PM +0100, Marc Zyngier wrote: > Since GICv4.1, it has become legal for an implementation to advertise > GICR_{INVLPIR,INVALLR,SYNCR} while having an ITS, allowing for a more > efficient invalidation scheme (no guest command queue contention when > multiple CPUs are generating invalidations). > > Provide the invalidation registers as a primitive to their ITS > counterpart. Note that we don't advertise them to the guest yet > (the architecture allows an implementation to do this). > I'll admit that this part tripped me up a bit, odd stuff. > Signed-off-by: Marc Zyngier Reviewed-by: Oliver Upton _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm