Re: [kvm-unit-tests PATCH v3 2/3] arm: pmu: Reset the pmu registers before starting some tests

From: Ricardo Koller <ricarkol@google.com>
To: Andrew Jones <andrew.jones@linux.dev>
Cc: kvm@vger.kernel.org, maz@kernel.org, kvmarm@lists.cs.columbia.edu
Subject: Re: [kvm-unit-tests PATCH v3 2/3] arm: pmu: Reset the pmu registers before starting some tests
Date: Wed, 10 Aug 2022 16:33:26 -0700	[thread overview]
Message-ID: <YvRARgEDkSI1ken5@google.com> (raw)
In-Reply-To: <20220810190216.hqt3wyzufyvhhpkf@kamzik>

On Wed, Aug 10, 2022 at 09:02:16PM +0200, Andrew Jones wrote:
> On Thu, Aug 04, 2022 at 05:41:38PM -0700, Ricardo Koller wrote:
> > Some registers like the PMOVS reset to an architecturally UNKNOWN value.
> > Most tests expect them to be reset (mostly zeroed) using pmu_reset().
> > Add a pmu_reset() on all the tests that need one.
> > 
> > As a bonus, fix a couple of comments related to the register state
> > before a sub-test.
> > 
> > Reviewed-by: Eric Auger <eric.auger@redhat.com>
> > Signed-off-by: Ricardo Koller <ricarkol@google.com>
> > ---
> >  arm/pmu.c | 6 ++++--
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> > 
> > diff --git a/arm/pmu.c b/arm/pmu.c
> > index 4c601b05..12e7d84e 100644
> > --- a/arm/pmu.c
> > +++ b/arm/pmu.c
> > @@ -826,7 +826,7 @@ static void test_overflow_interrupt(void)
> >  	write_regn_el0(pmevcntr, 1, PRE_OVERFLOW);
> >  	isb();
> >  
> > -	/* interrupts are disabled */
> > +	/* interrupts are disabled (PMINTENSET_EL1 == 0) */
> >  
> >  	mem_access_loop(addr, 200, pmu.pmcr_ro | PMU_PMCR_E);
> >  	report(expect_interrupts(0), "no overflow interrupt after preset");
> > @@ -842,7 +842,7 @@ static void test_overflow_interrupt(void)
> >  	isb();
> >  	report(expect_interrupts(0), "no overflow interrupt after counting");
> >  
> > -	/* enable interrupts */
> > +	/* enable interrupts (PMINTENSET_EL1 <= ALL_SET) */
> >  
> >  	pmu_reset_stats();
> >  
> > @@ -890,6 +890,7 @@ static bool check_cycles_increase(void)
> >  	bool success = true;
> >  
> >  	/* init before event access, this test only cares about cycle count */
> > +	pmu_reset();
> 
> This and the other pmu_reset() call below break compilation on 32-bit arm,
> because there's no pmu_reset() defined for it.
I completely missed the 32-bit arm case. Thanks!

> It'd probably be best if
> we actually implemented some sort of reset for arm, considering it's being
> called in common tests.

Mind if I start by creating a pmu_reset() for 32-bit arm, which can
later be used by a general arm_reset()?

> 
> Thanks,
> drew
> 
> >  	set_pmcntenset(1 << PMU_CYCLE_IDX);
> >  	set_pmccfiltr(0); /* count cycles in EL0, EL1, but not EL2 */
> >  
> > @@ -944,6 +945,7 @@ static bool check_cpi(int cpi)
> >  	uint32_t pmcr = get_pmcr() | PMU_PMCR_LC | PMU_PMCR_C | PMU_PMCR_E;
> >  
> >  	/* init before event access, this test only cares about cycle count */
> > +	pmu_reset();
> >  	set_pmcntenset(1 << PMU_CYCLE_IDX);
> >  	set_pmccfiltr(0); /* count cycles in EL0, EL1, but not EL2 */
> >  
> > -- 
> > 2.37.1.559.g78731f0fdb-goog
> > 
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