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[34.82.181.220]) by smtp.gmail.com with ESMTPSA id l125-20020a622583000000b0053659f296a0sm126783pfl.8.2022.09.09.12.40.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Sep 2022 12:40:56 -0700 (PDT) Date: Fri, 9 Sep 2022 12:40:52 -0700 From: Ricardo Koller To: Reiji Watanabe Subject: Re: [PATCH 2/9] KVM: arm64: selftests: Add write_dbg{b,w}{c,v}r helpers in debug-exceptions Message-ID: References: <20220825050846.3418868-1-reijiw@google.com> <20220825050846.3418868-3-reijiw@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220825050846.3418868-3-reijiw@google.com> Cc: kvm@vger.kernel.org, Marc Zyngier , Andrew Jones , Paolo Bonzini , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Wed, Aug 24, 2022 at 10:08:39PM -0700, Reiji Watanabe wrote: > Introduce helpers in the debug-exceptions test to write to > dbg{b,w}{c,v}r registers. Those helpers will be useful for > test cases that will be added to the test in subsequent patches. > Reviewed-by: Ricardo Koller > Signed-off-by: Reiji Watanabe > --- > .../selftests/kvm/aarch64/debug-exceptions.c | 72 +++++++++++++++++-- > 1 file changed, 68 insertions(+), 4 deletions(-) > > diff --git a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c > index 2ee35cf9801e..51047e6b8db3 100644 > --- a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c > +++ b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c > @@ -28,6 +28,69 @@ static volatile uint64_t svc_addr; > static volatile uint64_t ss_addr[4], ss_idx; > #define PC(v) ((uint64_t)&(v)) > > +#define GEN_DEBUG_WRITE_REG(reg_name) \ > +static void write_##reg_name(int num, uint64_t val) \ > +{ \ > + switch (num) { \ > + case 0: \ > + write_sysreg(val, reg_name##0_el1); \ > + break; \ > + case 1: \ > + write_sysreg(val, reg_name##1_el1); \ > + break; \ > + case 2: \ > + write_sysreg(val, reg_name##2_el1); \ > + break; \ > + case 3: \ > + write_sysreg(val, reg_name##3_el1); \ > + break; \ > + case 4: \ > + write_sysreg(val, reg_name##4_el1); \ > + break; \ > + case 5: \ > + write_sysreg(val, reg_name##5_el1); \ > + break; \ > + case 6: \ > + write_sysreg(val, reg_name##6_el1); \ > + break; \ > + case 7: \ > + write_sysreg(val, reg_name##7_el1); \ > + break; \ > + case 8: \ > + write_sysreg(val, reg_name##8_el1); \ > + break; \ > + case 9: \ > + write_sysreg(val, reg_name##9_el1); \ > + break; \ > + case 10: \ > + write_sysreg(val, reg_name##10_el1); \ > + break; \ > + case 11: \ > + write_sysreg(val, reg_name##11_el1); \ > + break; \ > + case 12: \ > + write_sysreg(val, reg_name##12_el1); \ > + break; \ > + case 13: \ > + write_sysreg(val, reg_name##13_el1); \ > + break; \ > + case 14: \ > + write_sysreg(val, reg_name##14_el1); \ > + break; \ > + case 15: \ > + write_sysreg(val, reg_name##15_el1); \ > + break; \ > + default: \ > + GUEST_ASSERT(0); \ > + } \ > +} > + > +/* Define write_dbgbcr()/write_dbgbvr()/write_dbgwcr()/write_dbgwvr() */ > +GEN_DEBUG_WRITE_REG(dbgbcr) > +GEN_DEBUG_WRITE_REG(dbgbvr) > +GEN_DEBUG_WRITE_REG(dbgwcr) > +GEN_DEBUG_WRITE_REG(dbgwvr) > + > static void reset_debug_state(void) > { > asm volatile("msr daifset, #8"); > @@ -59,8 +122,9 @@ static void install_wp(uint64_t addr) > uint32_t mdscr; > > wcr = DBGWCR_LEN8 | DBGWCR_RD | DBGWCR_WR | DBGWCR_EL1 | DBGWCR_E; > - write_sysreg(wcr, dbgwcr0_el1); > - write_sysreg(addr, dbgwvr0_el1); > + write_dbgwcr(0, wcr); > + write_dbgwvr(0, addr); > + > isb(); > > asm volatile("msr daifclr, #8"); > @@ -76,8 +140,8 @@ static void install_hw_bp(uint64_t addr) > uint32_t mdscr; > > bcr = DBGBCR_LEN8 | DBGBCR_EXEC | DBGBCR_EL1 | DBGBCR_E; > - write_sysreg(bcr, dbgbcr0_el1); > - write_sysreg(addr, dbgbvr0_el1); > + write_dbgbcr(0, bcr); > + write_dbgbvr(0, addr); > isb(); > > asm volatile("msr daifclr, #8"); > -- > 2.37.1.595.g718a3a8f04-goog > _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm