From: "Daniel P. Berrangé" <berrange@redhat.com>
To: Cornelia Huck <cohuck@redhat.com>
Cc: eric.auger.pro@gmail.com, eric.auger@redhat.com,
qemu-devel@nongnu.org, qemu-arm@nongnu.org,
kvmarm@lists.linux.dev, peter.maydell@linaro.org,
richard.henderson@linaro.org, alex.bennee@linaro.org,
maz@kernel.org, oliver.upton@linux.dev, sebott@redhat.com,
shameerali.kolothum.thodi@huawei.com, armbru@redhat.com,
abologna@redhat.com, jdenemar@redhat.com, agraf@csgraf.de,
shahuang@redhat.com, mark.rutland@arm.com, philmd@linaro.org,
pbonzini@redhat.com
Subject: Re: [PATCH v3 08/10] arm/cpu: more customization for the kvm host cpu model
Date: Tue, 13 May 2025 16:56:36 +0100 [thread overview]
Message-ID: <aCNrtM2U7OBKsnjQ@redhat.com> (raw)
In-Reply-To: <20250414163849.321857-9-cohuck@redhat.com>
On Mon, Apr 14, 2025 at 06:38:47PM +0200, Cornelia Huck wrote:
> From: Eric Auger <eric.auger@redhat.com>
>
> If the interface for writable ID registers is available, expose uint64
> SYSREG properties for writable ID reg fields exposed by the host
> kernel. Properties are named SYSREG_<REG>_<FIELD> with REG and FIELD
> being those used in linux arch/arm64/tools/sysreg. This done by
> matching the writable fields retrieved from the host kernel against the
> generated description of sysregs.
>
> An example of invocation is:
> -cpu host,SYSREG_ID_AA64ISAR0_EL1_DP=0x0
> which sets DP field of ID_AA64ISAR0_EL1 to 0.
Functionally this works, but stylewise it is rather too verbose
IMHO. I understand this aims to mtch the arm feature names, but
we can at least drop the SYSREG_ prefix here which IMHO doesn't
add much value. The <REG> component only has a small number of
possible prefixes, so it seems pretty unlikely we would get a
name clash between these and some other QOM property.
Also could we stick with lowercase, rather than uppercase. I
appreciate the spec uses uppercase, but that doesn't concern
itself with end user usage. If we just plain transform everything
to lowercase, there's still a clear mapping to the spec that
people will understand [1].
This example uses '-cpu host', but does this also work
with '-cpu max' ?
Conceptually '-cpu max' is supposed to be functionally identical
to '-cpu host' when KVM is enabled. Obviously you'd ned to
exclude it from '-cpu max' with TCG or other non-KVM accels.
> +/*
> + * decode_idreg_writemap: Generate props for writable fields
> + *
> + * @obj: CPU object
> + * @index: index of the sysreg
> + * @map: writable map for the sysreg
> + * @reg: description of the sysreg
> + */
> +static int
> +decode_idreg_writemap(Object *obj, int index, uint64_t map, ARM64SysReg *reg)
> +{
> + int i = ctz64(map);
> + int nb_sysreg_props = 0;
> +
> + while (map) {
> +
> + ARM64SysRegField *field = get_field(i, reg);
> + int lower, upper;
> + uint64_t mask;
> + char *prop_name;
> +
> + if (!field) {
> + /* the field cannot be matched to any know id named field */
> + warn_report("%s bit %d of %s is writable but cannot be matched",
> + __func__, i, reg->name);
> + warn_report("%s is cpu-sysreg-properties.c up to date?", __func__);
What scenario triggers this warning ? Is this in relation to QEMU
auto-detecting host CPU features, as opposed to user -cpu input ?
> + map = map & ~BIT_ULL(i);
> + i = ctz64(map);
> + continue;
> + }
> + lower = field->lower;
> + upper = field->upper;
> + prop_name = g_strdup_printf("SYSREG_%s_%s", reg->name, field->name);
> + trace_decode_idreg_writemap(field->name, lower, upper, prop_name);
> + object_property_add(obj, prop_name, "uint64",
> + get_sysreg_prop, set_sysreg_prop, NULL, field);
> + nb_sysreg_props++;
> +
> + mask = MAKE_64BIT_MASK(lower, upper - lower + 1);
> + map = map & ~mask;
> + i = ctz64(map);
> + }
> + trace_nb_sysreg_props(reg->name, nb_sysreg_props);
> + return 0;
> +}
> +
> +/* analyze the writable mask and generate properties for writable fields */
> +void kvm_arm_expose_idreg_properties(ARMCPU *cpu, ARM64SysReg *regs)
> +{
> + int i, idx;
> + IdRegMap *map = cpu->writable_map;
> + Object *obj = OBJECT(cpu);
> +
> + for (i = 0; i < NR_ID_REGS; i++) {
> + uint64_t mask = map->regs[i];
> +
> + if (mask) {
> + /* reg @i has some writable fields, decode them */
> + idx = kvm_idx_to_idregs_idx(i);
> + if (idx < 0) {
> + /* no matching reg? */
> + warn_report("%s: reg %d writable, but not in list of idregs?",
> + __func__, i);
> + } else {
> + decode_idreg_writemap(obj, i, mask, ®s[idx]);
> + }
> + }
> + }
> +}
> +
With regards,
Daniel
--
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next prev parent reply other threads:[~2025-05-13 15:57 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-14 16:38 [PATCH v3 00/10] kvm/arm: Introduce a customizable aarch64 KVM host model Cornelia Huck
2025-04-14 16:38 ` [PATCH v3 01/10] arm/cpu: Add infra to handle generated ID register definitions Cornelia Huck
2025-05-13 13:52 ` Eric Auger
2025-05-13 14:05 ` Cornelia Huck
2025-05-13 15:12 ` Eric Auger
2025-04-14 16:38 ` [PATCH v3 02/10] arm/cpu: Add sysreg properties generation Cornelia Huck
2025-04-15 7:09 ` Philippe Mathieu-Daudé
2025-04-15 7:20 ` Philippe Mathieu-Daudé
2025-05-19 14:49 ` Cornelia Huck
2025-05-13 15:23 ` Daniel P. Berrangé
2025-05-14 15:25 ` Cornelia Huck
2025-05-14 15:29 ` Daniel P. Berrangé
2025-04-14 16:38 ` [PATCH v3 03/10] arm/cpu: Add generated sysreg properties Cornelia Huck
2025-04-14 16:38 ` [PATCH v3 04/10] kvm: kvm_get_writable_id_regs Cornelia Huck
2025-05-13 14:20 ` Eric Auger
2025-05-13 14:42 ` Cornelia Huck
2025-05-13 15:16 ` Eric Auger
2025-04-14 16:38 ` [PATCH v3 05/10] arm/cpu: accessors for writable id registers Cornelia Huck
2025-04-29 16:27 ` Sebastian Ott
2025-04-30 13:48 ` Cornelia Huck
2025-04-14 16:38 ` [PATCH v3 06/10] arm/kvm: Allow reading all the writable ID registers Cornelia Huck
2025-05-13 14:31 ` Eric Auger
2025-05-16 14:17 ` Cornelia Huck
2025-05-20 14:05 ` Cornelia Huck
2025-05-23 8:27 ` Shameerali Kolothum Thodi
2025-05-26 12:37 ` Cornelia Huck
2025-04-14 16:38 ` [PATCH v3 07/10] arm/kvm: write back modified ID regs to KVM Cornelia Huck
2025-04-15 7:03 ` Philippe Mathieu-Daudé
2025-04-15 9:54 ` Cornelia Huck
2025-05-13 14:33 ` Eric Auger
2025-07-02 4:01 ` Jinqian Yang
2025-07-02 8:46 ` Cornelia Huck
2025-04-14 16:38 ` [PATCH v3 08/10] arm/cpu: more customization for the kvm host cpu model Cornelia Huck
2025-05-13 14:47 ` Eric Auger
2025-05-13 15:56 ` Daniel P. Berrangé [this message]
2025-05-16 14:42 ` Cornelia Huck
2025-05-13 15:59 ` Daniel P. Berrangé
2025-05-14 15:36 ` Cornelia Huck
2025-05-14 18:22 ` Daniel P. Berrangé
2025-05-16 14:51 ` Cornelia Huck
2025-05-16 14:57 ` Daniel P. Berrangé
2025-05-16 15:13 ` Cornelia Huck
2025-09-18 7:40 ` Jinqian Yang
2025-04-14 16:38 ` [PATCH v3 09/10] arm-qmp-cmds: introspection for ID register props Cornelia Huck
2025-05-13 14:50 ` Eric Auger
2025-04-14 16:38 ` [PATCH v3 10/10] arm/cpu-features: document ID reg properties Cornelia Huck
2025-05-13 15:09 ` Eric Auger
2025-05-13 16:23 ` Daniel P. Berrangé
2025-05-13 15:29 ` [PATCH v3 00/10] kvm/arm: Introduce a customizable aarch64 KVM host model Eric Auger
2025-05-14 13:47 ` Shameerali Kolothum Thodi
2025-05-14 14:47 ` Eric Auger
2025-05-23 13:23 ` Shameerali Kolothum Thodi
2025-05-26 12:44 ` Cornelia Huck
2025-05-27 10:06 ` Cornelia Huck
2025-06-03 15:14 ` Cornelia Huck
2025-06-04 10:58 ` Shameerali Kolothum Thodi
2025-06-04 12:35 ` Cornelia Huck
2025-06-04 13:45 ` Shameerali Kolothum Thodi
2025-06-05 16:31 ` Cornelia Huck
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