Re: [PATCH v2 1/6] arm64: make SCTLR2_EL1 accessible

[Yeoreum Yun <yeoreum.yun@arm.com>]

Hi Marc,

> > make SCTLR2_EL1 accssible to initilise it.
>
> nit: "accessible", "initialise".
>
> This could deserve a slightly less terse message, so that someone who
> is not very much versed into the boring details of the architecture
> can make sense of this patch. Because, frankly, if you can access
> HCRX_EL2, why can't you access SCTLR2_EL1? You know why, I know why,
> but hardly anyone else does.
>
> I'd suggest something along the lines of:
>
> "When the kernel runs at EL1, and yet is booted at EL2,
>  HCRX_EL2.SCTLR2En must be set to avoid trapping SCTLR2_EL1 accesses
>  from EL1 to EL2.
>
>  Ensure this bit is set at the point of initialising EL2."
>
> which at least explains why we're doing this.
>
> >
> > Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
> > ---
> >  arch/arm64/include/asm/el2_setup.h | 8 +++++++-
> >  1 file changed, 7 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
> > index 46033027510c..d755b4d46d77 100644
> > --- a/arch/arm64/include/asm/el2_setup.h
> > +++ b/arch/arm64/include/asm/el2_setup.h
> > @@ -57,9 +57,15 @@
> >          /* Enable GCS if supported */
> >  	mrs_s	x1, SYS_ID_AA64PFR1_EL1
> >  	ubfx	x1, x1, #ID_AA64PFR1_EL1_GCS_SHIFT, #4
> > -	cbz	x1, .Lset_hcrx_\@
> > +	cbz	x1, .Lskip_hcrx_GCSEn_\@
> >  	orr	x0, x0, #HCRX_EL2_GCSEn
> >
> > +.Lskip_hcrx_GCSEn_\@:
> > +	mrs_s	x1, SYS_ID_AA64MMFR3_EL1
> > +	ubfx	x1, x1, #ID_AA64MMFR3_EL1_SCTLRX_SHIFT, #4
> > +	cbz	x1, .Lset_hcrx_\@
> > +	orr	x0, x0, HCRX_EL2_SCTLR2En
> > +
> >  .Lset_hcrx_\@:
> >  	msr_s	SYS_HCRX_EL2, x0
> >  .Lskip_hcrx_\@:
>
> With that fixed,
>
> Reviewed-by: Marc Zyngier <maz@kernel.org>

Thanks for your suggetion.
I'll modify it.

>
> 	M.
>
> --
> Without deviation from the norm, progress is not possible.

--
Sincerely,
Yeoreum Yun