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From: Yeoreum Yun <yeoreum.yun@arm.com>
To: Dave Martin <Dave.Martin@arm.com>
Cc: catalin.marinas@arm.com, will@kernel.org, broonie@kernel.org,
	oliver.upton@linux.dev, anshuman.khandual@arm.com,
	robh@kernel.org, james.morse@arm.com, mark.rutland@arm.com,
	joey.gouly@arm.com, ahmed.genidi@arm.com, kevin.brodsky@arm.com,
	scott@os.amperecomputing.com, mbenes@suse.cz,
	james.clark@linaro.org, frederic@kernel.org, rafael@kernel.org,
	pavel@kernel.org, ryan.roberts@arm.com, suzuki.poulose@arm.com,
	maz@kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	kvmarm@lists.linux.dev
Subject: Re: [PATCH v4 4/5] arm64: initialise SCTLR2_EL1 at cpu_soft_restart()
Date: Mon, 1 Sep 2025 19:33:11 +0100	[thread overview]
Message-ID: <aLXm5/R+mrsnT7tn@e129823.arm.com> (raw)
In-Reply-To: <aLW4FTcqommWSIej@e133380.arm.com>

Hi Dave,

> > Explicitly initialize the SCTLR2_ELx register before launching
> > a new kernel via kexec() to avoid leaving SCTLR2_ELx with an
> > arbitrary value when the new kernel runs.
> >
> > Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
> > ---
> >  arch/arm64/kernel/cpu-reset.S      | 4 ++++
> >  arch/arm64/kvm/hyp/nvhe/hyp-init.S | 3 +++
> >  2 files changed, 7 insertions(+)
> >
> > diff --git a/arch/arm64/kernel/cpu-reset.S b/arch/arm64/kernel/cpu-reset.S
> > index c87445dde674..c8888891dc8d 100644
> > --- a/arch/arm64/kernel/cpu-reset.S
> > +++ b/arch/arm64/kernel/cpu-reset.S
> > @@ -37,6 +37,10 @@ SYM_TYPED_FUNC_START(cpu_soft_restart)
> >  	 * regime if HCR_EL2.E2H == 1
> >  	 */
> >  	msr	sctlr_el1, x12
> > +
> > +	mov_q	x12, INIT_SCTLR2_EL1
> > +	set_sctlr2_elx	1, x12, x8
> > +
>
> Nit: does it matter whether we reset SCTLR2 before SCTLR?
>
> I can't find a convincing architectural reason why they need to be
> reset in a particular order, but it looks a bit strange that the
> cpu_soft_restart and __kvm_handle_stub_hvc versions of this reset the
> registers in the opposite order...

TBH, I couldn't find the reason why SCTLR2_ELx should be initilized
before SCTLR_EL1. I don't think current bits on SCTLR2_ELx doesn't have
any effects from SCTLR_EL1 (MMU bit and etc) and vice versa.

But as other code, as you mention, it would be better to reorder this
initialization.

Thanks!

[...]

--
Sincerely,
Yeoreum Yun

  reply	other threads:[~2025-09-01 18:33 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-21 17:24 [PATCH v4 0/5] initialize SCTRL2_ELx Yeoreum Yun
2025-08-21 17:24 ` [PATCH v4 1/5] arm64: make SCTLR2_EL1 accessible Yeoreum Yun
2025-08-21 17:24 ` [PATCH v4 2/5] arm64: initialise SCTLR2_ELx register at boot time Yeoreum Yun
2025-09-01 15:13   ` Dave Martin
2025-09-01 18:29     ` Yeoreum Yun
2025-09-02 10:39       ` Dave Martin
2025-09-02 11:05         ` Yeoreum Yun
2025-09-03 10:43           ` Dave Martin
2025-09-03 10:59             ` Yeoreum Yun
2025-09-17 14:28     ` Yeoreum Yun
2025-08-21 17:24 ` [PATCH v4 3/5] arm64: save/restore SCTLR2_EL1 when cpu_suspend()/resume() Yeoreum Yun
2025-08-21 17:24 ` [PATCH v4 4/5] arm64: initialise SCTLR2_EL1 at cpu_soft_restart() Yeoreum Yun
2025-09-01 15:13   ` Dave Martin
2025-09-01 18:33     ` Yeoreum Yun [this message]
2025-08-21 17:24 ` [PATCH v4 5/5] arm64: make the per-task SCTLR2_EL1 Yeoreum Yun
2025-09-01 10:08 ` [PATCH v4 0/5] initialize SCTRL2_ELx Yeoreum Yun
2025-09-01 15:18 ` Dave Martin
2025-09-01 18:17   ` Yeoreum Yun
2025-09-03 10:52     ` Dave Martin
2025-09-03 12:08       ` Yeoreum Yun
2025-09-08 11:02         ` Dave Martin
2025-09-08 11:22           ` Yeoreum Yun
2025-09-08 12:49             ` Dave Martin

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