From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B223D3DA7CC for ; Thu, 15 Jan 2026 17:59:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768499956; cv=none; b=GvHdP24uqR+YlpAqzrS0uw4ouQoPvgLDTA8jMG5022+jmJIfUk2Jb0KSL0t2/p9eKjr8LICGf1hMr4764OvPLRvPI8hlu6IibDArtPh/u5xWWhN9HT9IDCGwIlnt/1Ez6cw471Pxxa1IDASc9KOMf2mvT3MSMRdQZn+In7Rg2PU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768499956; c=relaxed/simple; bh=nw9u7hY4Y9oNk8zEMNV5PCcDN3kvUufG+BbqCJuTOgI=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=eMxsbQcCWLNHE1im4pLEPPiqit8UpikdvTpSN9QEwlXfVkIKwsXCGeOycno/9dVY7AdI2QfdCrGI1TRctm/GNUxu+7wfMzUt7AHBgyBSD2M9ETFGwsAjjSW4BStwJe62K45+FOpyJsdC40JSoRZaPBQ3OFaprQeBazwe/YqR69g= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 275851515; Thu, 15 Jan 2026 09:59:07 -0800 (PST) Received: from arm.com (arrakis.cambridge.arm.com [10.1.197.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 81B5D3F632; Thu, 15 Jan 2026 09:59:08 -0800 (PST) Date: Thu, 15 Jan 2026 17:59:05 +0000 From: Catalin Marinas To: Ben Horgan Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com, baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com, dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com, fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com, jonathan.cameron@huawei.com, kobak@nvidia.com, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, peternewman@google.com, punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com, reinette.chatre@intel.com, rohit.mathew@arm.com, scott@os.amperecomputing.com, sdonthineni@nvidia.com, tan.shaopeng@fujitsu.com, xhao@linux.alibaba.com, will@kernel.org, corbet@lwn.net, maz@kernel.org, oupton@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, kvmarm@lists.linux.dev Subject: Re: [PATCH v3 03/47] arm64/sysreg: Add MPAMSM_EL1 register Message-ID: References: <20260112165914.4086692-1-ben.horgan@arm.com> <20260112165914.4086692-4-ben.horgan@arm.com> Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260112165914.4086692-4-ben.horgan@arm.com> On Mon, Jan 12, 2026 at 04:58:30PM +0000, Ben Horgan wrote: > The MPAMSM_EL1 register determines the MPAM configuration for an SMCU. Add > the register definition. > > Reviewed-by: Jonathan Cameron > Signed-off-by: Ben Horgan Acked-by: Catalin Marinas