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[35.189.192.250]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49fde1c0f6csm90764065e9.3.2026.09.23.05.18.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Sep 2026 05:18:43 -0700 (PDT) Date: Wed, 23 Sep 2026 12:18:39 +0000 From: Mostafa Saleh To: Jason Gunthorpe Cc: Nicolin Chen , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, iommu@lists.linux.dev, catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, joro@8bytes.org, mark.rutland@arm.com, qperret@google.com, tabba@google.com, vdonnefort@google.com, sebastianene@google.com, keirf@google.com Subject: Re: [PATCH v8 04/25] iommu/arm-smmu-v3: Move IDR parsing to common functions Message-ID: References: <20260922131259.2975334-1-smostafa@google.com> <20260922131259.2975334-5-smostafa@google.com> <20260923115257.GC2545495@nvidia.com> Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260923115257.GC2545495@nvidia.com> On Wed, Sep 23, 2026 at 08:52:57AM -0300, Jason Gunthorpe wrote: > On Wed, Sep 23, 2026 at 10:09:06AM +0000, Mostafa Saleh wrote: > > > > + if (coherent && !disable_msipolling && > > > > + smmu->features & ARM_SMMU_FEAT_MSI) > > > > + smmu->options |= ARM_SMMU_OPT_MSIPOLL; > > > > > > Will pKVM ever use MSIPOLL? > > > > No, this version does not support MSI and hides it. > > And this check can not be moved because disable_msipolling is a > > module_param. > > Could you move the above if into the shared area and have the callers > mask off options if they don't want it? Sure, I can move it and pass disable_polling as an arg which the hypervisor will set to true. > > > > > + if (smmu->features & ARM_SMMU_FEAT_HYP && > > > > + cpus_have_cap(ARM64_HAS_VIRT_HOST_EXTN)) > > > > + smmu->features |= ARM_SMMU_FEAT_E2H; > > > > > > Why is ARM64_HAS_VIRT_HOST_EXTN left behind? > > > > > > > cpus_have_cap() can not be used in the hypervisor. > > Also, ARM_SMMU_FEAT_E2H is not exactly FEAT_HYP. As it defines the > > world the translation lives in based on the kernel EL. > > But don't you need this FEAT to issue invalidations correctly? > pkvm never issues a S1 invalidation? No, STRW is enforced to zero (NS-EL1) with pKVM as the kernel must be running in EL1. pKVM will issue S1 CMDQ_OP_TLBI_NH_ALL to invalidate all of S1 after S2 changes and invalidations. > > > With pKVM at EL2 ARM64_HAS_VIRT_HOST_EXTN is always true anyway. > > > And the hypervisor never owns a page table itself, so it never > > checks this feature. > > ? I thought the whole point of this was for pkvm to own a S2? By own I mean "it's own translation regime" as if the hypervisor wants to do DMA itself (synonym to EL2-S1 translation) in that case the hypervisor will have a different STRW and use the E2H stuff. But that never happens, the hypervsior populates S2 to enforce isolation of the host but it never uses it itself. > > Maybe same as I suggested for MSIPOLL, set the FEAT and mask it later > if it can't be used. If KVM implicitly knows it has > ARM64_HAS_VIRT_HOST_EXTN then it should operate with ARM_SMMU_FEAT_E2H > set. > As I replied to Nicolin, the problem here is not the FEAT being used or not, it is that cpus_have_cap() can not be used in the hypervisor. I think this can be replaced with cpus_have_final_cap() which should be the same and then move this code also. > > Otherwise, I think we can move this check and use cpus_have_final_cap() > > instead as it can be used in the hypervisor. > > Or that, I don't know the difference I will try that for the next version. Thanks, Mostafa > > Jason