From: Zhangfei Gao <zhangfei.gao@linaro.org>
To: eric.auger@redhat.com, eric.auger.pro@gmail.com,
iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
joro@8bytes.org, will@kernel.org, robin.murphy@arm.com,
jean-philippe@linaro.org, zhukeqian1@huawei.com
Cc: kevin.tian@intel.com, jacob.jun.pan@linux.intel.com,
ashok.raj@intel.com, chenxiang66@hisilicon.com, maz@kernel.org,
vdumpa@nvidia.com, nicoleotsuka@gmail.com, vivek.gautam@arm.com,
alex.williamson@redhat.com, yi.l.liu@intel.com,
nicolinc@nvidia.com, vsethi@nvidia.com, sumitg@nvidia.com,
lushenming@huawei.com, wangxingang5@huawei.com
Subject: Re: [RFC v16 0/9] SMMUv3 Nested Stage Setup (IOMMU part)
Date: Tue, 7 Dec 2021 18:35:21 +0800 [thread overview]
Message-ID: <c1e9dd67-0000-28b5-81c0-239ceda560ed@linaro.org> (raw)
In-Reply-To: <7763531a-625d-10c6-c35e-2ce41e75f606@redhat.com>
On 2021/12/7 下午6:27, Eric Auger wrote:
> Hi Zhangfei,
>
> On 12/3/21 1:27 PM, Zhangfei Gao wrote:
>> Hi, Eric
>>
>> On 2021/10/27 下午6:44, Eric Auger wrote:
>>> This series brings the IOMMU part of HW nested paging support
>>> in the SMMUv3.
>>>
>>> The SMMUv3 driver is adapted to support 2 nested stages.
>>>
>>> The IOMMU API is extended to convey the guest stage 1
>>> configuration and the hook is implemented in the SMMUv3 driver.
>>>
>>> This allows the guest to own the stage 1 tables and context
>>> descriptors (so-called PASID table) while the host owns the
>>> stage 2 tables and main configuration structures (STE).
>>>
>>> This work mainly is provided for test purpose as the upper
>>> layer integration is under rework and bound to be based on
>>> /dev/iommu instead of VFIO tunneling. In this version we also get
>>> rid of the MSI BINDING ioctl, assuming the guest enforces
>>> flat mapping of host IOVAs used to bind physical MSI doorbells.
>>> In the current QEMU integration this is achieved by exposing
>>> RMRs to the guest, using Shameer's series [1]. This approach
>>> is RFC as the IORT spec is not really meant to do that
>>> (single mapping flag limitation).
>>>
>>> Best Regards
>>>
>>> Eric
>>>
>>> This series (Host) can be found at:
>>> https://github.com/eauger/linux/tree/v5.15-rc7-nested-v16
>>> This includes a rebased VFIO integration (although not meant
>>> to be upstreamed)
>>>
>>> Guest kernel branch can be found at:
>>> https://github.com/eauger/linux/tree/shameer_rmrr_v7
>>> featuring [1]
>>>
>>> QEMU integration (still based on VFIO and exposing RMRs)
>>> can be found at:
>>> https://github.com/eauger/qemu/tree/v6.1.0-rmr-v2-nested_smmuv3_v10
>>> (use iommu=nested-smmuv3 ARM virt option)
>>>
>>> Guest dependency:
>>> [1] [PATCH v7 0/9] ACPI/IORT: Support for IORT RMR node
>> Thanks a lot for upgrading these patches.
>>
>> I have basically verified these patches on HiSilicon Kunpeng920.
>> And integrated them to these branches.
>> https://github.com/Linaro/linux-kernel-uadk/tree/uacce-devel-5.16
>> https://github.com/Linaro/qemu/tree/v6.1.0-rmr-v2-nested_smmuv3_v10
>>
>> Though they are provided for test purpose,
>>
>> Tested-by: Zhangfei Gao <zhangfei.gao@linaro.org>
> Thank you very much. As you mentioned, until we do not have the
> /dev/iommu integration this is maintained for testing purpose. The SMMU
> changes shouldn't be much impacted though.
> The added value of this respin was to propose an MSI binding solution
> based on RMRRs which simplify things at kernel level.
Current RMRR solution requires uefi enabled,
and QEMU_EFI.fd has to be provided to start qemu.
Any plan to support dtb as well, which will be simpler since no need
QEMU_EFI.fd anymore.
Thanks
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next prev parent reply other threads:[~2021-12-07 10:37 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-27 10:44 [RFC v16 0/9] SMMUv3 Nested Stage Setup (IOMMU part) Eric Auger
2021-10-27 10:44 ` [RFC v16 1/9] iommu: Introduce attach/detach_pasid_table API Eric Auger
2021-12-06 10:48 ` Joerg Roedel
2021-12-07 10:22 ` Eric Auger
2021-12-08 2:44 ` Lu Baolu
2021-12-08 7:33 ` Eric Auger
2021-12-08 12:56 ` Jason Gunthorpe
2021-12-08 17:20 ` Jean-Philippe Brucker
2021-12-08 18:31 ` Jason Gunthorpe
2021-12-09 2:58 ` Tian, Kevin
[not found] ` <BN9PR11MB527624080CB9302481B74C7A8C709@BN9PR11MB5276.namprd11.prod.outlook.com>
2021-12-09 3:59 ` Tian, Kevin
2021-12-09 16:08 ` Jason Gunthorpe
2021-12-10 8:56 ` Tian, Kevin
2021-12-10 13:23 ` Jason Gunthorpe
2021-12-11 3:57 ` Tian, Kevin
2021-12-16 20:48 ` Jason Gunthorpe
2022-01-04 2:42 ` Tian, Kevin
2021-12-11 5:18 ` Tian, Kevin
2021-12-09 7:50 ` Eric Auger
2021-12-09 15:40 ` Jason Gunthorpe
2021-12-09 16:37 ` Eric Auger
2021-12-09 3:21 ` Tian, Kevin
2021-12-09 9:44 ` Eric Auger
2021-12-09 8:31 ` Eric Auger
2021-10-27 10:44 ` [RFC v16 2/9] iommu: Introduce iommu_get_nesting Eric Auger
2021-10-27 10:44 ` [RFC v16 3/9] iommu/smmuv3: Allow s1 and s2 configs to coexist Eric Auger
2021-10-27 10:44 ` [RFC v16 4/9] iommu/smmuv3: Get prepared for nested stage support Eric Auger
2021-10-27 10:44 ` [RFC v16 5/9] iommu/smmuv3: Implement attach/detach_pasid_table Eric Auger
2021-10-27 10:44 ` [RFC v16 6/9] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs Eric Auger
2021-10-27 10:44 ` [RFC v16 7/9] iommu/smmuv3: Implement cache_invalidate Eric Auger
2021-10-27 10:44 ` [RFC v16 8/9] iommu/smmuv3: report additional recoverable faults Eric Auger
2021-10-27 10:44 ` [RFC v16 9/9] iommu/smmuv3: Disallow nested mode in presence of HW MSI regions Eric Auger
2021-12-03 12:27 ` [RFC v16 0/9] SMMUv3 Nested Stage Setup (IOMMU part) Zhangfei Gao
2021-12-07 10:27 ` Eric Auger
2021-12-07 10:35 ` Zhangfei Gao [this message]
2021-12-07 11:06 ` Eric Auger
2021-12-08 13:33 ` Shameerali Kolothum Thodi
2021-12-03 13:13 ` Sumit Gupta
2021-12-07 10:28 ` Eric Auger
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