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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 10/15/24 11:39 PM, Joey Gouly wrote: > From: James Morse > > commit 011e5f5bf529f ("arm64/cpufeature: Add remaining feature bits in > ID_AA64PFR0 register") exposed the MPAM field of AA64PFR0_EL1 to guests, > but didn't add trap handling. A previous patch supplied the missing trap > handling. > > Existing VMs that have the MPAM field of ID_AA64PFR0_EL1 set need to > be migratable, but there is little point enabling the MPAM CPU > interface on new VMs until there is something a guest can do with it. > > Clear the MPAM field from the guest's ID_AA64PFR0_EL1 and on hardware > that supports MPAM, politely ignore the VMMs attempts to set this bit. > > Guests exposed to this bug have the sanitised value of the MPAM field, > so only the correct value needs to be ignored. This means the field > can continue to be used to block migration to incompatible hardware > (between MPAM=1 and MPAM=5), and the VMM can't rely on the field > being ignored. > > Signed-off-by: James Morse > Co-developed-by: Joey Gouly > Signed-off-by: Joey Gouly > --- > arch/arm64/kvm/sys_regs.c | 44 ++++++++++++++++++++++++++++++++++++--- > 1 file changed, 41 insertions(+), 3 deletions(-) > Reviewed-by: Gavin Shan