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From: "Zhang, Rui" <rui.zhang@intel.com>
To: "tglx@linutronix.de" <tglx@linutronix.de>,
	"x86@kernel.org" <x86@kernel.org>,
	"mingo@redhat.com" <mingo@redhat.com>,
	"rafael@kernel.org" <rafael@kernel.org>,
	"lenb@kernel.org" <lenb@kernel.org>,
	"bp@alien8.de" <bp@alien8.de>,
	"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>
Cc: "jmattson@google.com" <jmattson@google.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>
Subject: Re: [PATCH] x86/acpi: Fix LAPIC/x2APIC parsing order
Date: Wed, 11 Dec 2024 05:40:04 +0000	[thread overview]
Message-ID: <104d086f51d8e297e26fa52a1ebd091041ec2312.camel@intel.com> (raw)
In-Reply-To: <87zfl3b18t.ffs@tglx>

On Tue, 2024-12-10 at 23:51 +0100, Thomas Gleixner wrote:
> On Tue, Oct 22 2024 at 08:17, Zhang Rui wrote:
> > On some systems, the same CPU (with the same APIC ID) is assigned a
> > different logical CPU id after commit ec9aedb2aa1a ("x86/acpi:
> > Ignore
> > invalid x2APIC entries").
> > 
> > This means that Linux enumerates the CPUs in a different order,
> > which
> > violates ACPI specification[1] that states:
> > 
> >   "OSPM should initialize processors in the order that they appear
> > in
> >    the MADT"
> > 
> > The problematic commit parses all LAPIC entries before any x2APIC
> > entries, aiming to ignore x2APIC entries with APIC ID < 255 when
> > valid
> > LAPIC entries exist. However, it disrupts the CPU enumeration order
> > on
> > systems where x2APIC entries precede LAPIC entries in the MADT.
> > 
> > Fix the problem by separately checking LAPIC entries before parsing
> > any
> > LAPIC or x2APIC entries.
> 
> I really had to stare at the change to understand how this fixes
> anything. What you want to say is:
> 
> Fix this problem by:
> 
>     1) Parsing LAPIC entries first without registering them in the
>        topology to evaluate whether valid LAPIC entries exist.
> 
>     2) Restoring the MADT in order parser which invokes either the
> LAPIC or
>        the X2APIC parser function depending on the entry type.
> 
>        The X2APIC parser still ignores entries < 0xff in case that #1
>        found valid LAPIC entries independent of their position in the
>        MADT table.
> 
Exactly. Thanks for the rewording.

-rui

> Other than that:
> 
> Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
> 
>        


      reply	other threads:[~2024-12-11  5:40 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-22  0:17 [PATCH] x86/acpi: Fix LAPIC/x2APIC parsing order Zhang Rui
2024-12-10 14:59 ` Jim Mattson
2024-12-10 22:51 ` Thomas Gleixner
2024-12-11  5:40   ` Zhang, Rui [this message]

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