Re: C states on AMD SMP

Janosch Machowinski
2005-09-10T12:47:58Z

Erik Slagter wrote:
> On Sat, 2005-09-10 at 10:59 +0200, Janosch Machowinski wrote:
>
>>>Is there a way to patch the FADT or to fool linux-acpi into it does
>>>actually work (to at least be able to test the thing)?
>>
>>Shure, patch the verify functions in processor_idle.c ...
>>But actually I think this is no good idea...
>
>
> I tested it a few mins ago and there's good news and bad news ;-)
>
> The very bad news is that my power meter is in a place I cannot reach at
> the moment;
>
> The good news is that CPU0 now has three C3 states and is almost
> constantly running in that state;
>
> The bad news is that CPU1 still reports only C1.
That's a bug:
Here a comment from ACPI Spec 3.0 :
Processor power state support is symmetric when presented via the FADT
and P_BLK interfaces; OSPM
assumes all processors in a system support the same power states. If
processors have non-symmetric power
state support, then the BIOS will choose and use the lowest common power
states supported by all the
processors in the system through the FADT table. For example, if the
CPU0 processor supports all power
states up to and including the C3 state, but the CPU1 processor only
supports the C1 power state, then
OSPM will only place idle processors into the C1 power state (CPU0 will
never be put into the C2 or C3
power states). Notice that the C1 power state must be supported. The C2
and C3 power states are optional
(see the PROC_C1 flag in the FADT table description in section 5.2.6,
“System Description Table
Header”).

Feel free to write a patch
>
> Could it be that the "restriction" of this chipset is, that the complete
> system (including both cpu's) always must run in the same C-state? That
> would be no real problem for me.
No, every Processor can use the Sleep states independent (with some
restrictions, see ACPISpec p. 257).

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